Robust Time Synchronization for Industrial Internet of Things by H _∞ Output Feedback Control

Abstract

Precise timing over timestamped packet exchange communication is an enabling technology in the mission-critical industrial Internet of Things, particularly when satellite-based timing is unavailable. The main challenge is to ensure timing accuracy when the clock synchronisation system is subject to disturbances caused by the drifting frequency, time-varying delay, jitter, and timestamping uncertainty. In this work, a Robust Packet-Coupled Oscillators (R-PkCOs) protocol is proposed to reduce the effects of perturbations manifested in the drifting clock, timestamping uncertainty and delays. First, in the spanning tree clock topology, time synchronisation between an arbitrary pair of clocks is modelled as a state-space model, where clock states are coupled with each other by one-way timestamped packet exchange (referred to as packet coupling), and the impacts of both drifting frequency and delays are modelled as disturbances. A static output controller is adopted to adjust the drifting clock. The H∞ robust control design solution is proposed to guarantee that the ratio between the modulus of synchronisation precision and the magnitude of the disturbances is always less than a given value. Therefore, the proposed time synchronisation protocol is robust against the disturbances, which means that the impacts of drifting frequency and delays on the synchronisation accuracy are limited. The one-hour experimental results demonstrate that the proposed R-PkCOs protocol can realise time synchronisation with the precision of six microseconds in a 21-node IEEE 802.15.4 network. This work has widespread impacts in the process automation of automotive, mining, oil and gas industries.

Robust Synchronized Data Acquisition for Biometric Authentication

“…Even though the standard deviation of MAC-level timestamp accuracy is around 1 µs [16], within the progress of sending and receiving a packet, the use of two timestamps for calculating clock offset 1 still lets the one-way synchronisation protocol [on the high-frequency (e.g. 32.768 MHz) embedded clock] suffer from the timestamp accuracy.…”

“…no varying and low-resolution correction value) limits synchronisation performance [12], [23]. Hence, a Proportional (P) controller [16] is utilised to solve the above issue. In [21], the moving average solution is adopted for clock skew estimation, and a Proportional-Integral (PI) controller is used in [12] for eliminating the impacts of drifting clock skew.…”

“…Hence, we use a dynamic controller (which is an advanced version of the PI controller and moving average methods) to adjust both the clock offset and skew, thereby extending previous works (i.e. [16], [24], [25]). This recursive controlling strategy possesses the features of compensating for the impacts of drifting clock frequency, and naturally removing the effects of varying processing delay.…”

“…of the PI controller and moving average solutions) are determined empirically [12], [21]. In [16], the H ∞ method is used to design the P controller parameters in a pairwise network. Nevertheless, this work utilises the H ∞ solution for networked dynamic controller parameters' selection.…”

“…In practice, as a result of the manufacturing tolerance and operating temperatures, P i [n] of the i-th regular node cannot be equal to P 0 [n]. Based on [16], P i [n] is given by…”