Robust neural logic block (NLB) based on memristor crossbar array

Chabi, Djaafar; Zhao, Weisheng; Querlioz, Damien; Klein, Jacques-Olivier

doi:10.1109/nanoarch.2011.5941495

Cited by 66 publications

(36 citation statements)

References 24 publications

(30 reference statements)

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Neural-inspired Boolean operators are presented that operate over spike sequences. Neural logic blocks are presented in [107], which consist of a hybrid of CMOS and memristor circuit arrangement that can be reconfigured, as a FPGA. The system is presented to be fault-tolerant, and Monte Carlo simulations have been processed to confirm this statement.…”

Section: Prospective Applications and Marketmentioning

confidence: 99%

Neuromorphic microelectronics from devices to hardware systems and applications

Schmid

2016

NOLTA

View full text Add to dashboard Cite

Neuromorphic systems aiming at mimicking some characteristics of the nervous systems of living humans or animals have been developed since the late 1980s', taking benefit of intrinsic properties and increasing performances of the successive silicon fabrication technologies. A regain of interest has been observed in the middle of the 2010s', which manifests itself from the emergence of large-scale projects integrating various computational and hardware perspectives, by the increased interest and involvement of industry and the growth of the volume of scientific publications. This paper reviews research directions and methods of neuromorphic microelectronics hardware, the developed hardware and its performance, and discusses current issues and potential future developments.

show abstract

Section: Prospective Applications and Marketmentioning

confidence: 99%

Neuromorphic microelectronics from devices to hardware systems and applications

Schmid

2016

NOLTA

View full text Add to dashboard Cite

show abstract

“…Work has been completed that shows how memristors can be used in neural logic blocks in a Field Trainable Neural Array (FTNA) [24]. Each neural block contained a memristor crossbar array and CMOS learning cells to program the memristive weights.…”

Section: Related Workmentioning

confidence: 99%

“…Memristors [7] have received significant attention as a potential building block for neuromorphic systems [8,9]. The recent physical realization of the memristor [10] has produced a nanoscale non-volatile device with a large varying resistance range.…”

Section: Introductionmentioning

confidence: 99%

Enabling back propagation training of memristor crossbar neuromorphic processors

Hasan

Taha

2014

2014 International Joint Conference on Neural Networks (IJCNN)

View full text Add to dashboard Cite

Recent studies have shown that memristor crossbar based neuromorphic hardware enables high performance implementations of neural networks at low power and in low chip area. This paper presents circuits to train a cascaded set of memristor crossbars representing a multi-layered neural network. The circuits presented implement back-propagation training and would enable on-chip training of memristor crossbars. On-chip training of memristor crossbars can be necessary to overcome the effect of device variability and alternate current paths within crossbars being used as neural networks. We model the memristor crossbars in SPICE in order capture alternate current paths and the impact of wire resistance. Our design can be scaled to multiple neural layers and multiple output neurons. We demonstrate the training of up to three layered neural networks evaluating non-linearly separable functions through detailed SPICE simulations. This is the first study in the literature we have seen that examines the implementation of back-propagation based training of memristor crossbar circuits. The impact of this work would be to enable the design of highly energy efficient and compact neuromorphic processing systems that can be trained to implement large deep networks (such as deep belief networks).

show abstract

“…The concept of a memristor-based neural logic block (NLB) was first introduced in Chabi et al [20] as a robust alternative to the configurable logic block (CLB) approach to FPGA design. The authors' design is based on a memristor crossbar with threshold logic, bipolar, and binary output neurons.…”

Section: Neural Logic Blocksmentioning

confidence: 99%