Robust feature extraction algorithm suitable for real-time embedded applications

Aguilar-González, Abiel; Arias-Estrada, Miguel; Berry, François

doi:10.1007/s11554-017-0701-8

Cited by 2 publications

(2 citation statements)

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“…Many researchers have investigated the FPGA implementation of features extraction and/or matching for real-time applications [1][3][8] [10]. In [1] a FPGA architecture is proposed which extracts features for Full HD images with a speed of 44 frames/s. They used non-textured corner filter combined to a subpixel refinement.…”

Section: Related Workmentioning

confidence: 99%

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2021

International Journal of Advanced Research in Computer and Comm

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Visual feature extraction is widely used in many of computer vision algorithms such as object detection, stereo matching, image matching, and Visual SLAM. Real-time implementation of visual feature extraction suffers from long latency, and heavy computation. GPUs are commonly used to accelerate computationally intensive applications, but they are power hungry devices and, they have a fixed level of parallelism. To achieve processing optimization for such computationally intensive applications, FPGA, and ASIC are more efficient. In this work, an efficient and optimized FPGA architecture is designed to accelerate the computation of visual feature extraction. FAST and BRIEF algorithms are used in this system because they are simple and efficient when working with mobile and embedded systems. The system uses different frequency clocks for input pixels streaming and for processing to prevent stall cycles and achieve high speed. Multi pixels are processed per single clock cycle using optimized parallel and pipelined architecture. The proposed architecture is implemented on TERASIC DE2-115 FPGA board and tested with different image sizes and achieved very high throughput. The system can detect features up to 1000 frames per second for grayscale images with the size of 480 ×480 pixels.

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Section: Related Workmentioning

confidence: 99%

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2021

International Journal of Advanced Research in Computer and Comm

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“…Smart cameras are image/video acquisition devices with self‐contained image processing algorithms that simplify the formulation of a particular application . For example, algorithms for smart video surveillance could detect and track pedestrians, but for a robotic application, algorithms could be feature detection or feature tracking . In this work, the aim is for a fast/accurate solution for the chlorophyll estimation problem.…”

Section: Introductionmentioning

confidence: 99%

An FPGA‐based smart camera for accurate chlorophyll estimations

Pérez-Patricio

Aguilar-González

Camas-Anzueto

et al. 2018

Circuit Theory & Apps

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In this work, a new chlorophyll estimation approach based on the reflectance/ transmittance from the leaf being analyzed is proposed. First, top/underside images from the leaf under analysis are captured, then, the base parameters (reflectance/transmittance) are extracted. Finally, a double-variable linear regression model estimates the chlorophyll content. To estimate the base parameters, a novel optical arrangement is presented. On the other hand, in order to provide a portable device suitable for chlorophyll estimation under large scale food crops, we have implemented our optical arrangement and our algorithmic formulation inside an field-programmable gate array (FPGA)-based smart camera fabric. Experimental results demonstrated that the proposed approach outperforms (in terms of accuracy and processing speed) most previous vision-based approaches, reaching more than 97% accuracy and delivering fast chlorophyll estimations (near 5 ms per estimation).

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Robust feature extraction algorithm suitable for real-time embedded applications

Cited by 2 publications

References 46 publications

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An FPGA‐based smart camera for accurate chlorophyll estimations

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