Robust Cu Dual Damascene Interconnects With Porous SiOCH Films Fabricated by Low-Damage Multi-Hard-Mask Etching Technology

Abstract

Low-damage hard-mask (HM) plasma-etching technology for porous SiOCH film ( = 2 6) has been developed for robust 65-nm-node Cu dual damascene interconnects (DDIs). No damage is introduced by fluorocarbon plasma etching irrespective of whether rigid ( = 2 9) or porous ( = 2 6) SiOCH films are used, due to the protective CF-polymer layer deposited on the etched sidewall. The etching selectivity of the SiOCH films to the inorganic HMs is kept high by controlling the radical ratio of carbon relative to oxygen in the etching plasma gas. However, oxidation damage penetrates the films from the sidewalls due to the O 2 plasma used for photoresist ashing. This damage is increased by the porous structure. As a result, we developed a via-first multihard-mask process for the DD structure in porous SiOCH film with no exposure to O 2 -ashing plasma, and we controlled the via-taper angle by RF bias during etching. We fabricated robust Cu DDIs with tapered vias in porous SiOCH film that can be applied to 65-nm-node ULSIs and beyond.Index Terms-Author, please supply your own keywords or send a blank e-mail to keywords@ieee.org to receive a list of suggested keywords.

Hard-Mask-Through UV-Light-Induced Damage to Low-k Film during Plasma Process for Dual Damascene

“…In general, to successfully form a dual damascene structure in low-k material, hard masks such as SiO2 or SiN are used to protect the low-k films from the unnecessary chemical reactions with radicals or ions in the plasma process [1][2]. On the other hand, as many papers report, UV light has been used as a cure technique of low-k film for polymerization and porogen burnout [3].…”

“…Furthermore, hard masks such as SiO 2 or SiN are used to protect the low-k films from undesirable chemical reactions with radicals or ions in the plasma process. [5][6][7][8] Figures 1 and 2 show examples of typical process flows of dual-damascene formation with low-k materials. In the processes such as the via-hole/trench reactive ion etching (RIE) process, resist ashing after the etching process, resist ashing in rework and the second hard mask deposition on the first hard mask, the low-k film surface is always covered with a hard mask and never exposed to the plasma.…”

Review of methods for the mitigation of plasma‐induced damage to low‐dielectric‐constant interlayer dielectrics used for semiconductor logic device interconnects

“…Via‐first DD formation with S‐MAP eliminates the undesirable SiO 2 fence around the top of via holes. Similarly, multi‐layer hard masks with several inorganic films, such as SiO 2 /SiN/SiO 2 , on BARC and photoresist coatings are used to create a stacked low‐k film . The capping layer of SiO 2 reduces plasma‐induced damage and increases resistance in the CMP process.…”

“…For oxygen‐containing plasma treatment, Ohtake et al reported a via‐first multi‐hard‐mask process for the DD structure in porous SiOCH film with no exposure to O 2 ‐ashing plasma. In addition, they reported that nitrogen‐based plasma with oxygen and high‐molecular‐weight fluorocarbon gas (C > 2) chemically modifies the sidewall surface of the etched low‐k film .…”

Comprehensive Chemistry Designs in Porous SiOCH Film Stacks and Plasma Etching Gases for Damageless Cu Interconnects in Advanced ULSI Devices

“…To reduce the low-k damage, a multihard mask (MHM) process using thin SiN/SiO SiN has been developed [8]. By the MHM process, the ashing damage is reduced significantly, however, the shouldering of thin HM layers increases the deviation in the line width as well as the line-edge roughness, resulting in the interline shortage especially in scaled-down interconnects.…”