Robust Converter Control Design under Time-Delay Uncertainty

Abstract

This paper deals with the converter control design under time delay uncertainty in power systems with high share of converter-based generation. Two approaches for time delay modeling are proposed using linear fractional transformations and linear parameter-varying systems, respectively. Subsequently, two output-feedback synthesis methods are implemented based on H∞ control theory, and formulated using linear matrix inequalities: (i) a norm-bounded parametric H∞ controller; and (ii) a gain-scheduled H∞ control. These robust control principles are then employed to improve the performance of Voltage Source Converters (VSCs) under varying measurement delays. Three novel control strategies are proposed in order to redesign the conventional inner control loop and improve converter performance when dealing with measurement uncertainty. Finally, the controllers are integrated into a state-of-the-art VSC model and compared using time-domain simulations.