2022
DOI: 10.3390/en15197355
|View full text |Cite
|
Sign up to set email alerts
|

Robust Control and Optimization Method for Single-Phase Grid-Connected Inverters Based on All-Pass-Filter Phase-Locked Loop in Weak Grid

Abstract: In a distributed generation system, the all-pass-filter phase-locked loop (APF-PLL) is a commonly used method for grid synchronization. However, the coupling effect between APF-PLL and current control loop increases the risk of oscillation instability for the inverter in the weak grid. At present, there are few effective methods to solve the adverse effect of APF-PLL on the inverter-grid interconnection system in the weak grid. Therefore, a small-signal impedance model of the inverter considering the dual d-q … Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
1
1

Citation Types

0
0
0

Year Published

2023
2023
2024
2024

Publication Types

Select...
4
2

Relationship

0
6

Authors

Journals

citations
Cited by 6 publications
(5 citation statements)
references
References 33 publications
0
0
0
Order By: Relevance
“…This reduction in time delay enhances the frequency estimation. In this structure, the input voltage is written as a summation of the positive component (v p e jωt+∅ 1 ) and negative component (v n e −jωt+∅ 1 ) as in Equation (63), where the phase shift angles ∅ 1 and ∅ 2 are neglected for simplicity:…”
Section: Non-adaptive 1-𝜙 Cdsc-pll2mentioning
confidence: 99%
See 1 more Smart Citation
“…This reduction in time delay enhances the frequency estimation. In this structure, the input voltage is written as a summation of the positive component (v p e jωt+∅ 1 ) and negative component (v n e −jωt+∅ 1 ) as in Equation (63), where the phase shift angles ∅ 1 and ∅ 2 are neglected for simplicity:…”
Section: Non-adaptive 1-𝜙 Cdsc-pll2mentioning
confidence: 99%
“…The all-pass filter PLL (APF-PLL) is a simple and stable performance method widely used in grid synchronization. However, APF-PLL performance degrades under distorted grid conditions, resulting in low-frequency oscillations appearing in the estimated phase and frequency [60][61][62][63][64]. To solve this problem, the work in [3] modified APF-PLLs to suppress harmonics and the DC offset effectively by using the band-pass filter (BPF) as a pre-filter of APF-PLL in the first structure, and the APF-PLL is integrated with the harmonic decoupling network (HDN) and multiple pre-filters.…”
Section: Introductionmentioning
confidence: 99%
“…Simultaneously, owing to the small equivalent resistance R s of the parallel resonant circuit, a large harmonic voltage is generated, which in turn generates a large harmonic resonant current in the parallel resonant circuit. This can severely affect the voltage at the PCC node and degrade the power quality of the system, thereby affecting the normal power consumption of customers [35].…”
Section: Composite Control Strategies and Issuesmentioning
confidence: 99%
“…Synchronization techniques are employed to achieve fast and accurate grid synchronization between power electronics converters and the grid. Phase Locked Loop (PLL) algorithms are probably the most popular and widely used techniques for grid synchronization owing to their robustness and effectiveness [5][6][7][8][9]. Several research were done in designing PLLs for grid synchronization [5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20].…”
Section: Introductionmentioning
confidence: 99%
“…Recently, researchers have conducted several sorts of single-phase PLL research, and numerous single-phase PLL variants have been proposed and examined. The most popular techniques for creating an orthogonal signal include the Inverse Park Approach (IPA) [21], Transfer Delay (TD) [10,22,23], Second Order Generalized Integrator (SOGI) [15][16][17]24,25], Kalman Filter (KF) [14,26], All-Pass Filter [18,19], and Moving Average Filter (MAF) [27].…”
Section: Introductionmentioning
confidence: 99%