Robust amplitude measurement for RF BIST applications

Jeong, Jae Woong; Kitchen, Jennifer; Ozev, Sule

doi:10.1109/ets.2015.7138762

Cited by 7 publications

(5 citation statements)

References 23 publications

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“…For RF BIST, typically, RF-to-DC or RF-IF conversion together with an RF signal source is used to generate and analyze the signal. In [17,30], a process-robust circuit is presented to generate RF square-wave signals. This source can be used to measure the absolute power output of an RF circuit provided that is a tuned circuit.…”

Section: Introductionmentioning

confidence: 99%

“…However, these technologies are prone to higher process variations and defect rates, which makes RF BIST both more necessary and more challenging. Several techniques in the literature aim to reduce the dependence on external RF instrumentation for low cost testing [2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18]. In [2][3][4], simple test signals such as multi-tone sinusoidal signals, are used to generate output data, where the performance of RF transceiver is predicted using the output data as well as machine learning methods.…”

Section: Introductionmentioning

confidence: 99%

“…This technique works very well when the DUT output is high enough to generate a thermal gradient. Most research in generic RF BIST has focused on the measurement side via the use of peak or power detectors [11][12][13][14][15][16][17]27]. Two kinds of RF detectors are widely used to measure RF circuit performance.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Process independent gain measurement with low overhead via BIST/DUT co-design

Jeong

Kitchen

Ozev

2016

2016 IEEE 34th VLSI Test Symposium (VTS)

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Built-in Self-Test (BIST) is essential, particularly for radio frequency (RF) devices where off-chip RF signal analysis is costly or in some cases, infeasible. Two major problems have made RF BIST elusive. First, process variations make the BIST circuit behavior hard to predict, limiting accuracy of measurements. Second, the overhead, particularly in terms of performance degradation, make RF BIST undesirable. In this paper, we address these two issues for RF BIST gain measurement. First, we show that by setting up relative gain measurements and carefully crafting the BIST methodology and the matching BIST circuit, the effect of process variations on measurement accuracy can be suppressed. Second, by codesigning the BIST circuit together with the device under test (DUT), performance impact can be eliminated or significantly reduced. To demonstrate the proposed approach, we design a low noise amplifier (LNA) as the DUT together with the BIST circuit. We also design a stand-alone LNA with the same specifications and manufacture these two circuits on the same die. We show that the LNA gain can be determined very accurately, using only DC measurements, and the performance impact of the BIST circuit is negligible.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Process independent gain measurement with low overhead via BIST/DUT co-design

Jeong

Kitchen

Ozev

2016

2016 IEEE 34th VLSI Test Symposium (VTS)

Self Cite

View full text Add to dashboard Cite

show abstract

“…Meanwhile, most of BIST techniques for the digital circuits are designed to be a fully on-chip, there is still less common approach for built-in testing hardware in analog circuits. Several approaches have focused on the monitoring of circuits parameter such as amplitude [1,2], current [3], and DC-offset error [4]. These methods provide an accurate measurement, however typically requires a high-precision test stimulus such as a linear-ramp generator [5], sinusoidal waveform [6] as well as pseudo-random patterns [7], which is relatively difficult to generate on-chip.…”

Section: Introductionmentioning

confidence: 99%

Phase difference analysis technique for parametric faults BIST in CMOS analog circuits

Wannaboon

Jiteurtragool

San-Um

et al. 2018

IEICE Electron. Express

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Detection of parametric faults is a crucial issue due to the large variation of the fabrication process, which provide a range of acceptable parameter deviations in analog circuits. This paper presents a phase difference analysis technique, which is sensitive to the parametric deviations and allows a tolerance band of passive analog components. Test operations can be simply achieved by comparing the phase difference between a reference clock signal and a reconfigured circuit-under-test (CUT) as an oscillator. The difference of phase characteristics between the two signals can be utilized as an indicator for a fault signature, which can be characterized by a compact digital circuit comprising a counter and logic components. Simulation of faults detection reveals a high faults coverage, high-speed testing, and tolerance band controllability. The proposed technique has offered a fully on-chip BIST in 0.18-µm CMOS standard technology with no external test equipment required.

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“…In [12], we have introduced a BIST method to measure the gain of a circuit using two signals, where the ratio of the signal amplitudes is known. In this paper, we propose a new BIST method and the associated circuitry to measure the phase mismatch of the phased array using signals with unknown amplitudes.…”

mentioning

confidence: 99%

A self-compensating built-in self-test solution for RF phased array mismatch

Jeong

Kitchen

Ozev

2015

2015 IEEE International Test Conference (ITC)

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An RF Phased array can steer the direction of the beam electronically and it brings about benefits in terms of signal to noise ratio (SNR) and directivity. However, testing the phased array generally requires expensive and high performance RF equipment. This increases production test cost and hampers in-field calibration. We present a low-cost, self-compensating Built-In Self-test (BIST) and calibration solution for RF phased arrays. In our proposed method, we apply a sinusoidal test signal with unknown amplitude to the inputs of two adjacent phased array elements and measure the baseband output signal after down-conversion. Mathematical modeling of the circuit impairments and phased array behavior indicates that by using two distinct input amplitudes, both of which can remain unknown, it is possible to measure the important parameters of the phased array, such as gain and phase mismatch. The BIST circuits are designed and post layout simulations are performed with within-die and die-to-die process variations. Simulations confirm that the BIST circuit provides very accurate results without having to know sinusoidal signal amplitudes or the relation between them. Furthermore, a prototype four-element phased-array PCB was designed and fabricated for verifying our proposed method. With the proposed method, the phase difference between elements can be measured and calibrated with less than 1 error, which would allow for self-monitoring in 6-bit phased array applications.

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Robust amplitude measurement for RF BIST applications

Cited by 7 publications

References 23 publications

Process independent gain measurement with low overhead via BIST/DUT co-design

Process independent gain measurement with low overhead via BIST/DUT co-design

Phase difference analysis technique for parametric faults BIST in CMOS analog circuits

A self-compensating built-in self-test solution for RF phased array mismatch

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