RISC-V Core for Ethical Intelligent IoT Edge: Analysis &amp; Design Choice

Haribabu, P; Gvk, Sasirekha; Rao, Madhav; Bapat, Jyotsna; Das, Debabrata

doi:10.1109/ccgridw59191.2023.00031

2023 IEEE/ACM 23rd International Symposium on Cluster, Cloud and Internet Computing Workshops (CCGridW) 2023

DOI: 10.1109/ccgridw59191.2023.00031

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RISC-V Core for Ethical Intelligent IoT Edge: Analysis & Design Choice

P Haribabu

Sasirekha Gvk

Madhav Rao

et al.

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2024

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“…RISC-V, as an open instruction set architecture, has also shown tremendous potential in the IoT domain. Reference [13] delves into the challenges faced in developing SoCs for IoT edge devices, proposing a security and privacy-based architecture, which provides valuable insights for the development of IoT edge systems. Reference [14] introduces a refined RISC-V Instruction Set Architecture (ISA) extension scheme for efficient FFT (Fast Fourier Transform) operations.…”

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confidence: 99%

“…This system employs a software-hardware co-design approach to achieve emotion analysis of multimodal information through efficient modal interaction and semantic elimination. Additionally, reference [19] introduces a lightweight Continuous Monitoring System (CMS) based on softwarehardware co-design, which can communicate with RISC-V to identify any anomalies in its operational behavior.…”

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confidence: 99%

See 1 more Smart Citation

A Custom RISC-V Based SOC Chip for Commodity Barcode Identification

Lin,

Wang,

Cai

et al. 2024

IEEE Access

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The Internet of Things (IoT) is a crucial component of the contemporary information industry and represents a significant advancement in information technology aimed at enhancing both human productivity and daily existence. Their applications are extensive and far-reaching. However, the present state of research on the design of low-cost IoT SoC chips leveraging open-source instruction set architectures lacks the requisite depth and breadth. To meet the requirements of lowcost Internet of Things (IoT) system-on-chip (SoC) development, this study presents a commodity code recognition SoC chip based on the RISC-V instruction set architecture, which is capable of performing image acquisition and barcode recognition. The proposed system comprises two main components: a low-power RISC-V processor and an image recognition module. This study initially enhanced the speed, accuracy, and area efficiency of the hardware design of a commodity barcode imagerecognition module. Subsequently, the image recognition control module was developed using the RISC-V processor and CMOS image sensor OV7670, and the outcomes of image recognition were accessed through interrupts. The processing speed for collecting and identifying 640×480 images on the FPGA board was 11.4FPS, and the image recognition rate was 99.5%. The chip was taped-out using the UMC55n process, which successfully decoded the barcodes and output the results at a working frequency of 40 MHz.

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confidence: 99%

mentioning

confidence: 99%

A Custom RISC-V Based SOC Chip for Commodity Barcode Identification

Lin,

Wang,

Cai

et al. 2024

IEEE Access

View full text Add to dashboard Cite

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RISC-V Core for Ethical Intelligent IoT Edge: Analysis & Design Choice

Cited by 1 publication

References 25 publications

A Custom RISC-V Based SOC Chip for Commodity Barcode Identification

A Custom RISC-V Based SOC Chip for Commodity Barcode Identification

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