RF mixers using standard digital CMOS 0.35 μm process

Geffroy, V.; Astis, G. De; Bergeault, E.

doi:10.1109/mwsym.2001.966844

Cited by 13 publications

(5 citation statements)

References 1 publication

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“…The resistive ring mixers with high 1 dB compression point output third-order intercept point (IP3) have been proposed [2][3][4]. However, the resistive ring mixers typically suffer from a larger chip dimension primarily because of the inclusion of the intermediate frequency (IF) balun.…”

Section: Introductionmentioning

confidence: 99%

A Broadband Doubly Balanced Monolithic Ring Mixer With a Compact Intermediate Frequency (If) Extraction

et al. 2011

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Abstract-To meet the requirements for broadband operation, high port-to-port isolation, and miniature chip area, a doubly balanced monolithic microwave ring mixer with an advanced IF extraction fabricated using 0.15 µm GaAs pHEMT process is presented. A miniature Marchand-like spiral balun with low-pass filter is used to extract IF signals and maintain balun performance simultaneously. The low-pass filter can filter out both the RF and LO signals. This miniaturized mixer design can mitigate layout complexity, improve port-to-port isolations suitable for ultra-broadband Ku-, K-, and Kaband applications. Subsequently, the LO/RF-to-IF isolations are greater than 43.2 and 32 dB from 11 to 40 GHz, respectively. The LO-to-RF isolation is between 26.9 and 50.7 dB within the same swept range. The conversion loss is 7.2-12.4 dB within the operating bandwidth.

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Section: Introductionmentioning

confidence: 99%

A Broadband Doubly Balanced Monolithic Ring Mixer With a Compact Intermediate Frequency (If) Extraction

et al. 2011

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“…To make mixer loads, we have to choose between resistors, LC circuit or PMOS transistors. The use of LC circuit is not an integrable solution .The use of PMOS transistors as active loads gets higher gain than resistors [11], for equivalent power consumption. Moreover, this will allow even higher gain without using up too much headroom and allows for smaller on chip space requirements as compared to a resistor.…”

Section: Folded Mixer Circuit Topologymentioning

confidence: 99%

0.5-7.5 GHZ LOW-POWER, INDUCTORLESS CURRENT FOLDED MIXER IN 0.18-μM CMOS FOR BROADBAND APPLICATIONS

Fashtali

Maghsoodi

Atani

et al. 2013

IJEEE

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A fully differential low-power down-conversion mixer using a TSMC 0.18-μm CMOS process is presented in this paper. The proposed mixer is based on a folded double-balanced Gilbert cell topology that enhances conversion gain and reduces power dissipation. Though, this mixer is designed for 5.8 GHz ISM band applications, but at 0.5-7.5 GHz, the proposed mixer exhibits a maximum conversion gain of 12dB, maximum IIP3 of -2.5 dBm, maximum input 1-dB compression point of -13 dBm, the minimum DSB noise figure of 9.2 dB and a dc power consumption of 2.52 mW at 1.8 V power supply. Also, this circuit architecture increases port-to-port isolations to above 140 dB. Moreover this mixer is suitable for broadband applications.

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“…The two circuits were simulated with an input amplitude mismatch between the I and Q phase of the LO signal, ε A ranging from 0.1% to 10%. Equation (6) and (7) are used to calculate the theoretical IBR for the two mixers, respectively. The results are shown in Fig.…”

Section: Comparison Of the Image Rejection Performancementioning

confidence: 99%

“…It was not mentioned which kind of mixer was used in the structure. A detailed comparison between the Gilbert mixer and the passive mixer has been presented in [6], focusing on the conversion gain, noise figure, linearity and power consumption.…”

Section: Introductionmentioning

confidence: 99%