RF-CMOS performance trends

Woerlee, P.H.; Knitel, M.J.; Langevelde, R. van; Klaassen, D.B.M.; Tiemeijer, L.F.; Scholten, A.J.; Duijnhoven, A.T.A. Zegers-van

doi:10.1109/16.936707

Cited by 295 publications

(45 citation statements)

References 4 publications

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“…Nevertheless, in mm-wave/sub mm-wave design, there is one common requirement, which is to maximize device cut-off frequencies for ultra high frequency operations. There are two types of cut-off frequency definitions: f T , unit current gain frequency, and f MAX , unit power gain frequency, which are associated with device parameters and can be represented as [29]:…”

Section: Mosfet Design Optimizationmentioning

confidence: 99%

Physical design optimization of MOSFETs for millimeter wave and sub-millimeter wave circuits

Liu

2015

Analog Integr Circ Sig Process

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Deep-scaled CMOS technologies have provided ultra-high speed devices and enabled the possibility to achieve integrated millimeter wave and sub-millimeter wave systemon-a-chip (SoC). However, the drawbacks and constraints of deep-scaled technologies require not only creative circuit design ideas but also accurate active device models and optimum physical design. The paper presents a systematic design approach to optimize active device physical design and build the corresponding model, which is exemplified through two layout examples. With the optimum active device physical design and new circuit design ideas, we have successfully demonstrated several key circuits in mm-wave/sub-mm-wave frequency ranges: a 450 GHz voltage controlled oscillator, a 200 GHz frequency divider, and a 200 GHz amplifier all in 65 nm bulk CMOS technologies. The availability of these key building blocks would benefit the realization of mm-wave/sub-mmwave SoCs in the future.

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Section: Mosfet Design Optimizationmentioning

confidence: 99%

Physical design optimization of MOSFETs for millimeter wave and sub-millimeter wave circuits

Liu

2015

Analog Integr Circ Sig Process

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“…This was due to a lack of suitable technology and RF/Analog and Mixed Signal (RFA&MS) design tools. It is the premise of this article that SiGe BiCMOS and RF CMOS are two technologies that are now available that satisfy the technology needs for highly complex RF/A&MS products [4,5]. However, the EDA toolset for highly complex RF/A&MS products is still lacking.…”

Section: Introductionmentioning

confidence: 97%

Imagine the Future in Telecommunications Technology

Harame

Joseph

Coolbaugh

et al. 2002

32nd European Solid-State Device Research Conference

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The wired (networking) and wireless telecommunications areas are rapidly expanding in applications and data rates. This drives a need for highly complex RF/Analog and Mixed Signal products. SiGe BiCMOS and RF CMOS are the two technologies that are capable of fulfilling the technology requirements for these products. The active and passives device suite is described. The application areas for Bipolar and CMOS are discussed. SiGe BiCMOS products examples are given.

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“…Due to the dominance of digital CMOS in the market, majority of reported works on SSOI have focused on ON/OFF currents and device threshold voltage optimization. However, in sub-100 nm scale, the analog RF performance of SSOI devices will be important as well, a fact currently overlooked in the literature [4].…”

Section: Introductionmentioning

confidence: 99%

RF Performance of Strained SiGe pMOSFETs: Linearity and Gain

Kaya

2004

J Comput Electron

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The RF performance of strained-SiGe pMOSFETs on SOI substrates has been investigated through the use of TCAD simulations. To optimize RF performance of strained-SiGe pMOSFETs, including intrinsic gain, linearity and g m /I d , we propose to vary the Ge concentration in the channel, shrink the SOI thickness and adopt an asymmetric doping profile along the channel. We find that neither strain nor the asymmetric doping approach is able to unlock the trade-off between intrinsic gain and linearity found in bulk and SOI relaxed Si MOSFETs. Instead, SOI layer thickness control provides an alternative approach to improving gain without sacrificing linearity. For optimized RF performance, the strained-SiGe pMOSFETs with high Ge concentrations (0.3 ≤ x ≤ 0.7) in the channel and thin SOI layers (<20 nm) are preferred.

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RF-CMOS performance trends

Cited by 295 publications

References 4 publications

Physical design optimization of MOSFETs for millimeter wave and sub-millimeter wave circuits

Physical design optimization of MOSFETs for millimeter wave and sub-millimeter wave circuits

Imagine the Future in Telecommunications Technology

RF Performance of Strained SiGe pMOSFETs: Linearity and Gain

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