RF characterization and parameter extraction for CMOS device models

Pekarik, Jack; Jagannathan, B.; Pan, Li-Hong; Wang, Jing; Groves, R.; Li, Hongmei; Tian, Xiong; Greenberg, D.; Jin, Zhiyang; Wagner, L.

doi:10.1109/smic.2007.322763

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Cited by 3 publications

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“…As displayed on Fig. 2, this resistance results from the contact resistance along with a salicided polysilicon resistance from contact to active region , and the distributed gate resistance over active area [11], [12]. expression is then (8) with the gate sheet resistance per square, the finger width, and the number of fingers.…”

Section: Design Methodologymentioning

confidence: 99%

NMOS Device Optimization for the Design of a W-Band Double-Balanced Resistive Mixer

Viallon

Ménéghin

Parra

2014

IEEE Microw. Wireless Compon. Lett.

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This letter describes the implementation of NMOS devices in a passive ring mixer whose operating frequency reaches device's cut-off frequency. Conversion gain, linearity and required LO power are discussed regarding device geometry using simple analytic formulas and electrical simulations. The mixer is then embedded in a down-converter including RF, LO and IF buffers and integrated in a 130 nm BiCMOS SiGe technology. Measurements indicate a conversion gain of 14.5 dB at 76.8 GHz, an output-referred 1 dB compression point of and a DSB noise figure of 6.3 dB confirming the interest of double-balanced passive mixers at millimeter-wave frequencies.

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Section: Design Methodologymentioning

confidence: 99%