Revisiting the Parallel Strategy for DOACROSS Loops

Song, Lei; Cui, Yuanzhen; Zou, Nianjun; Zhu, Wenhao; Zhang, Dong; Wu, Weiguo

doi:10.1007/s11390-019-1919-7

Cited by 3 publications

(2 citation statements)

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“…Several important contributions in automatic parallelization are highlighted in the publications. 25,39 In this section DOALL 40 and, DOACROSS 41 have been discussed among different automatic parallelization techniques as they are widely used in practice due to their less complexity. By applying speculative parallelism, techniques like DOALL (Figure 1) and DOACROSS (Figure 1), multicore architectures can easily be exploited.…”

Section: Automatic and Speculative Parallelizing Techniquesmentioning

confidence: 99%

“…The thread start is actually the extraction process of the threads from a sequential workload for a speculative parallelism procedure. The commit operation is an exclusive process performed when a nonspeculative thread ends its execution as shown in Figure 1 which is explained by DOALL 40 and DOACROSS 41 loop execution which is explained in Section 2.1.…”

Section: Introductionmentioning

confidence: 99%

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An efficient hardware supported and parallelization architecture for intelligent systems to overcome speculative overheads

Kumar

Singh

Aggarwal³

et al. 2022

Int J of Intelligent Sys

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In the last few decades, technology advancements have paved the way for the creation of intelligent and autonomous systems that utilize complex calculations which are both time‐consuming and central processing unit intensive. As a consequence, parallel processing systems are gaining popularity to enhance overall computer performance. Programmers should be able to efficiently utilize available hardware resources with parallelization in an ideal world. Through the automatic parallelization of sequential code, multithreading can be executed without extra supervision. However, a wide range of software dependencies prevents this from being feasible. An architectural framework for speculative parallelization along with an efficient memory analysis and computational algorithms for the code generation are proposed that can provide optimal performance. Furthermore, a suitable support of hardware design as a runtime library to the proposed architectural framework is presented which can be used to recover misspeculated results during execution to minimize speculative parallelism overhead. The implementation makes use of the Low‐Level Virtual Machine compiler infrastructure and is tested on numerous benchmarks, thus making it highly scalable in terms of programming languages and architectures. According to our experimental results, there is significant potential for speedup increase. In comparison to the overall function speedup, that is, geomean speedup of 5.2× approximately when using the proposed architecture without hardware support, the proposed architectural framework and algorithm with hardware support give an average geomean speedup of 7.0× approximately on the given benchmark which is written in C/C++.

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Section: Automatic and Speculative Parallelizing Techniquesmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%