Reversable data hiding for content verification and quality access control of image and its hardware implementaion

Jana, Poulami; Phadikar, Amit; Maity, Goutam Kumar; Mandal, Himadri; Chiu, Tien‐Lung

doi:10.1109/iceeot.2016.7755321

Cited by 2 publications

(1 citation statement)

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“…Hardware-based watermarking has been the subject of a few studies as mentioned here. Jana et al [19] presented an FPGA prototype of the reversible watermarking method in the DCT domain. The image is divided into 8 by 8 blocks of pixels and then DCT is calculated.…”

Section: Related Workmentioning

confidence: 99%

Digital Design for Image-Adaptive Watermarking using CDF 5/3 Wavelet

Lande¹,

Talbar²,

Shinde³

2019

IJEAT

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Paper This paper presents a hardware architecture for image-adaptive watermarking in the wavelet domain. The embedding strength factor is selected by calculating the energy present between the different frequency bands. The current algorithm is constructed on a CDF 5/3 wavelet based on the model of lossless compression JPEG 2000. Wavelet filters are implemented using a parallel architecture with a lifting scheme, which makes them more efficient in terms of speed and hardware utilization. The top module of the system is built with the combination of serial-parallel architecture to balance the speed and power consumption. The presented watermarking system is tested using hardware in the loop-testing technique. The objective is to develop an image-adaptive, real time, low power consumption and robust watermarking system, which can be incorporated into existing hardware such as digital cameras, scanners, and camcorders. The watermarking system's efficiency against different assaults has been evaluated using the StirMark software. The proposed watermarking system showed robustness against most of the geometric and non-geometric attacks.

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Section: Related Workmentioning

confidence: 99%