Revealing GPUs Vulnerabilities by Combining Register-Transfer and Software-Level Fault Injection

Santos, Fernando Fernandes dos; Condia, Josie E. Rodriguez; Carro, Luigi; Reorda, M. Sonza; Rech, Paolo

doi:10.1109/dsn48987.2021.00042

Cited by 25 publications

(21 citation statements)

References 35 publications

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“…Thus, the framework provides a tunable and efficient balance between the representativeness and the cost of a fault-injection campaign. In [26], the authors proposed a methodology to evaluate the reliability of CNNs running on GPUs by combining low-level microarchitectural and software-based fault injection to determine microarchitectural faults in functional units and propagate the error effects at the instruction levels. This method reduces the profiling and fault injection campaigns by selecting a set of applications on a few operative data ranges, which are representative enough of the operation of functional units and some control modules in a GPU.…”

Section: A Methodologies For Reliability Evaluationmentioning

confidence: 99%

An Effective Method to Identify Microarchitectural Vulnerabilities in GPUs

Condia

Rech

Santos

et al. 2022

IEEE Trans. Device Mater. Relib.

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Graphics Processing Units (GPUs) are increasingly adopted in several domains where reliability is fundamental, such as self-driving cars and autonomous systems. Unfortunately, GPU devices have been shown to have a high error rate, while the constraints imposed by real-time safety-critical applications make traditional (and costly) replication-based hardening solutions inadequate.This work proposes an effective methodology to identify the architectural vulnerable sites in GPUs modules, i.e. the locations that, if corrupted, most affect the correct instructions execution. We first identify, through an innovative method based on Register-Transfer Level (RTL) fault injection experiments, the architectural vulnerabilities of a GPU model. Then, we mitigate the fault impact via selective hardening applied to the flip-flops that have been identified as critical. We evaluate three hardening strategies: Triple Modular Redundancy (TMR), Triple Modular Redundancy against SETs (∆TMR), and Dual Interlocked Storage Cells (Dice flip-flops). The results gathered on a publicly available GPU Model (FlexGripPlus) considering functional units, pipeline registers, and warp scheduler controller show that our method can tolerate from 85% to 99% of faults in the pipeline registers, from 50% to 100% of faults in the functional units and up to 10% of faults in the warp scheduler, with a reduced hardware overhead (in the range of 58 % to 94% when compared with traditional TMR).Finally, we adapt the methodology to perform a complementary evaluation targeting permanent faults and identify critical sites prone to propagate fault effects across the GPU. We found that a considerable percentage (65% to 98%) of flip-flops that are critical for transient faults are also critical for permanent faults.

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Section: A Methodologies For Reliability Evaluationmentioning

confidence: 99%

An Effective Method to Identify Microarchitectural Vulnerabilities in GPUs

Condia

Rech

Santos

et al. 2022

IEEE Trans. Device Mater. Relib.

Self Cite

View full text Add to dashboard Cite

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“…Classical strategies for GPUs, such as simulation-and emulation-based fault analyses, provide fine-grain characterizations and allow the identification of vulnerable structures under focused evaluations [26], [27]. However, evaluations on complete designs and large applications might involve unfeasible evaluation times.…”

Section: A Motivation and Related Workmentioning

confidence: 99%

Special Session: Reliability Assessment Recipes for DNN Accelerators

Ahmadilivani,

Bosio,

Deveautour

et al. 2024

2024 IEEE 42nd VLSI Test Symposium (VTS)

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HAL is a multi-disciplinary open access archive for the deposit and dissemination of scientific research documents, whether they are published or not. The documents may come from teaching and research institutions in France or abroad, or from public or private research centers. L'archive ouverte pluridisciplinaire HAL, est destinée au dépôt et à la diffusion de documents scientifiques de niveau recherche, publiés ou non, émanant des établissements d'enseignement et de recherche français ou étrangers, des laboratoires publics ou privés.

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“…In the modified version of the NVBitFi, the kernels are instrumented, and a random fault site inside the layer kernel is selected. Using the fault models based on [21], we can inject multiple types of faults, corrupting single registers or one register in an entire GPU warp. in Figure 1a.…”

Section: Radiation Induced Errors In Dnnsmentioning

confidence: 99%

Characterizing a Neutron-Induced Fault Model for Deep Neural Networks

Santos

Kritikakou

Condia

et al. 2023

IEEE Trans. Nucl. Sci.

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The reliability evaluation of Deep Neural Networks (DNNs) executed on Graphic Processing Units (GPUs) is a challenging problem since the hardware architecture is highly complex and the software frameworks are composed of many layers of abstraction. While software-level fault injection is a common and fast way to evaluate the reliability of complex applications, it may produce unrealistic results since it has limited access to the hardware resources and the adopted fault models may be too naive (i.e., single and double bit flip). Contrarily, physical fault injection with neutron beam provides realistic error rates but lacks fault propagation visibility. This paper proposes a characterization of the DNN fault model combining both neutron beam experiments and fault injection at software level. We exposed GPUs running General Matrix Multiplication (GEMM) and DNNs to beam neutrons to measure their error rate. On DNNs, we observe that the percentage of critical errors can be up to 61%, and show that ECC is ineffective in reducing critical errors. We then performed a complementary software-level fault injection, using fault models derived from RTL simulations. Our results show that by injecting complex fault models, the YOLOv3 misdetection rate is validated to be very close to the rate measured with beam experiments, which is 8.66× higher than the one measured with fault injection using only single-bit flips.

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Revealing GPUs Vulnerabilities by Combining Register-Transfer and Software-Level Fault Injection

Cited by 25 publications

References 35 publications

An Effective Method to Identify Microarchitectural Vulnerabilities in GPUs

An Effective Method to Identify Microarchitectural Vulnerabilities in GPUs

Special Session: Reliability Assessment Recipes for DNN Accelerators

Characterizing a Neutron-Induced Fault Model for Deep Neural Networks

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