Retargetable compiled simulation of embedded processors using a machine description language

Pees, Stefan; Hoffmann, Andreas; Meyr, H.

doi:10.1145/362652.362662

Cited by 34 publications

(8 citation statements)

References 33 publications

(31 reference statements)

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“…The language has been used to produce production quality simulators [31]. An important aspect of the LISA language is its ability to capture control paths explicitly.…”

Section: Lisamentioning

confidence: 99%

“…Such translation can be done either at compile time (static compiled simulation), where the fetch-decode-dispatch overhead is completely eliminated, or at load time (dynamic compiled simulation), which amortises the overhead over repeated execution of code. Simulators based on the static compilation model are presented by Zhu and Gajski [44] and Pees et al [31]. Examples of dynamic compiled code simulators include the Shade simulator [45], and the Embra simulator [46].…”

Section: Simulatorsmentioning

confidence: 99%

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Processor Description Languages

Mishra¹,

Dutt²

2008

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Embedded systems present a tremendous opportunity to customise designs by exploiting the application behaviour. Shrinking time-to-market, coupled with short product lifetimes, create a critical need for rapid exploration and evaluation of candidate architectures. Architecture description languages (ADL) enable exploration of programmable architectures for a given set of application programs under various design constraints such as area, power and performance. The ADL is used to specify programmable embedded systems, including processor, coprocessor and memory architectures. The ADL specification is used to generate a variety of software tools and models facilitating exploration and validation of candidate architectures. The paper surveys the existing ADLs in terms of (a) the inherent features of the languages and (b) the methodologies they support to enable simulation, compilation, synthesis, test generation and validation of programmable embedded systems. It concludes with a discussion of the relative merits and demerits of the existing ADLs and expected features of future ADLs.

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“…The language has been used to produce production quality simulators [31]. An important aspect of the LISA language is its ability to capture control paths explicitly.…”

Section: Lisamentioning

confidence: 99%

Section: Simulatorsmentioning

confidence: 99%

Processor Description Languages

Mishra¹,

Dutt²

2008

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“…using LISA [Pees et al 2000] and RADL [Siska 1998]. This section briefly describes retargetable simulator generation using the EXPRESSION ADL for instruction-set architecture (ISA) simulation as well as cycle-accurate simulation.…”

Section: Retargetable Simulator Generationmentioning

confidence: 99%

Architecture description language (ADL)-driven software toolkit generation for architectural exploration of programmable SOCs

Mishra

Shrivastava

Dutt

2004

ACM Trans. Des. Autom. Electron. Syst.

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Advances in semiconductor technology permit increasingly complex applications to be realized using programmable systems-on-chips (SOCs). Furthermore, shrinking time-to-market demands, coupled with the need for product versioning through software modification of SOC platforms, have led to a significant increase in the software content of these SOCs. However, designer productivity is greatly hampered by the lack of automated software generation tools for the exploration and evaluation of different architectural configurations. Traditional hardware-software codesign flows do not support effective exploration and customization of the embedded processors used in programmable SOCs. The inherently application-specific nature of embedded processors and the stringent area, power, and performance constraints in embedded systems design critically require a fast and automated architecture exploration methodology. Architecture description language (ADL)-Driven design space exploration and software toolkit generation strategies present a viable solution to this problem, providing a systematic mechanism for a top-down design and validation of complex systems. The heart of this approach lies in the ability to automatically generate a software toolkit that includes an architecture-sensitive compiler, a cycle-accurate simulator, assembler, debugger, and verification/validation tools. This article illustrates a software toolkit generation methodology using the EXPRESSION ADL. Our exploration studies demonstrate the need for and usefulness of this approach, using as an example the problem of compiler-in-the-loop design space exploration of reduced instruction-set embedded processor architectures.• 627 Additional

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“…S* was used to automatically generate simulators in a "retargetable firmware development system" [9] at the University of Aachen. Interestingly enough, researchers from the same university have more recently designed a technique for the retargetable generation of very fast simulators [40].…”

Section: Early Workmentioning

confidence: 99%

Retargetable Compiler Technology for Embedded Systems

Leupers

Marwedel

2001

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Retargetable compiled simulation of embedded processors using a machine description language

Cited by 34 publications

References 33 publications

Processor Description Languages

Processor Description Languages

Architecture description language (ADL)-driven software toolkit generation for architectural exploration of programmable SOCs

Retargetable Compiler Technology for Embedded Systems

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