Response-Time Analysis of DAG Tasks Supporting Heterogeneous Computing

Abstract

Hardware platforms are evolving towards parallel and heterogeneous architectures to overcome the increasing necessity of more performance in the real-time domain. Parallel programming models are fundamental to exploit the performance capabilities of these architectures. This paper proposes a novel response time analysis (RTA) for verifying the schedulability of DAG tasks supporting heterogeneous computing. It analyzes the impact of executing part of the DAG in the accelerator device. As a result, the response time upper bound of the system is more precise than the one provided by currently existing RTA targeting homogeneous architectures. INTRODUCTIONParallel and heterogeneous hardware architectures become mainstream in the embedded domain to cope the increasing performance requirements. These architectures integrate low power generalpurpose multi-cores (known as host) with dedicated accelerator devices like DSP fabrics, GPUs or FPGAs. Some examples are the NVIDIA Tegra X1 [14], TI Keystone II [20] or Xilinx UltraScale [11].Parallel programming models are fundamental to effectively exploit the huge performance capabilities of these architectures. As an example, OpenMP [15] is increasingly being adopted in architectures targeting embedded systems. As a matter of fact, all parallel architectures presented above support OpenMP in their software development kit. Moreover, OpenMP incorporates a host-centric acceleration model to efficiently offload code and data to devices.Functional and non-functional verification is fundamental when designing real-time embedded systems. However, the use of parallel programming models like OpenMP involves many challenges to assure that software satisfies both functional and non-functional requirements. This paper addresses the latter, focusing on the worstcase response time analysis of OpenMP programs. It is worth mentioning however that recent works have addressed functional verification of OpenMP programs [16], demonstrating the benefits of using OpenMP in real-time embedded systems.Regarding timing verification, the sporadic DAG task model [6] analyzes the response time of systems composed of parallel tasks modeled with direct acyclic graphs (DAGs) [4,9,12]. Interestingly,

Optimized Partitioning and Priority Assignment of Real-Time Applications on Heterogeneous Platforms with Hardware Acceleration

“…The work in [36] proposes a mapping of multiple DAG tasks that also minimizes power consumption, without considering hardware accelerators. A response time analysis for a DAG task on a heterogeneous platform with a single hardware accelerator is presented in [66]. Only applications performing a single acceleration request for the whole application (composed of a single DAG task) are supported.…”

Worst-Case Response Time Analysis of Multitype DAG Tasks Based on Reconstruction

“…The algorithm does not consider the task execution interval defined by the parallel node segment, which will cause a large number of processors to be idle waiting for the execution of other task nodes in the same node segment, and the WCRT obtained is less accurate. Serrano et al [13] proposed a DAG conversion strategy for DAG tasks that support parallel and heterogeneous computing. This strategy avoids the interference between parallel tasks by allocating some of them to the accelerator for execution, reduces the idle waiting time of the processor, and obtains the WCRT of the task, but this method does not consider the possibility that the assignment of different tasks leads to different results.…”

“…Previous studies [10][11][12][13] analyzed the execution sequence of the tasks, studied the relationship among the execution time of tasks, the length of the critical path, and the WCRT, and helped improve the effect of the task execution time on the WCRT for polynomial solving tasks. Using polynomial needs to consider the influence of different factors on the WCRT, and the calculation method is complicated.…”

The AMPERE Project: : A Model-driven development framework for highly Parallel and EneRgy-Efficient computation supporting multi-criteria optimization

“…AMPERE's vision is that state-of-the-art parallel programming execution models are mature enough (or can be efficiently extended) to support the fulfillment of functional and non-functional constraints captured by the DSML used to develop CPSs. Interestingly, despite current parallel programming models are agnostic of non-functional constraints, recent studies demonstrated that OpenMP allows providing trustworthy timing guarantees [24]- [28], and so fitting the timing requirements of critical systems. Moreover, it has been demonstrated that OpenMP is not a threat regarding functional safety [29], and that both compilers and runtimes can be used to check correctness and recover from failures [21].…”