Resistance requirements of threshold switching selectors in 1S1R crossbar array

Lin, Chenglong; Li, Gaosheng; Xue-qing, Jia

doi:10.1051/matecconf/201712804017

Cited by 3 publications

(4 citation statements)

References 11 publications

(8 reference statements)

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“…The current–voltage characteristics are diode-like [ 22 ], without hysteresis during forward and reverse voltage sweep; i.e., the selector material should be free of shallow and deep traps, which are able to capture and hold negative charge.…”

Section: Methodsmentioning

confidence: 99%

“…(1) The current-voltage characteristics are diode-like [22], without hysteresis during forward and reverse voltage sweep; i.e., the selector material should be free of shallow and deep traps, which are able to capture and hold negative charge. ( 2) Selector resistance at a programming voltage (typically of 0.5 V to 1 V) should be in a range of 10 2 to 10 4 Ω, depending on the memory cell resistance in its low-resistance state (LRS) [23].…”

Section: Methodsmentioning

confidence: 99%

“…Crossbar RRAM arrays are crucial for creating the next generation of large memory arrays, Crossbar arrays for matrix multiplication and analogue neuromorphic networks [ 18 , 19 ]. However, in Crossbar structures, an additional selector device is required to eliminate sneak path currents and provide accurate read and write operations [ 20 , 21 , 22 , 23 , 24 ]. There are a variety of selector devices, including transistors [ 25 ], tunnel diodes [ 21 , 26 , 27 ], varistors [ 28 ], mixed-conductivity devices (MIEC) [ 29 ], punchthrough diodes [ 30 ], electromechanical diodes [ 31 ] and Zener diodes [ 32 ].…”

Section: Introductionmentioning

confidence: 99%

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Modeling of Self-Aligned Selector Based on Ultra-Thin Metal Oxide for Resistive Random-Access Memory (RRAM) Crossbar Arrays

Fedotov,

Korotitsky,

Koveshnikov

2024

Nanomaterials

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Resistive random-access memory (RRAM) is a crucial element for next-generation large-scale memory arrays, analogue neuromorphic computing and energy-efficient System-on-Chip applications. For these applications, RRAM elements are arranged into Crossbar arrays, where rectifying selector devices are required for correct read operation of the memory cells. One of the key advantages of RRAM is its high scalability due to the filamentary mechanism of resistive switching, as the cell conductivity is not dependent on the cell area. Thus, a selector device becomes a limiting factor in Crossbar arrays in terms of scalability, as its area exceeds the minimal possible area of an RRAM cell. We propose a tunnel diode selector, which is self-aligned with an RRAM cell and, thus, occupies the same area. In this study, we address the theoretical and modeling aspects of creating a self-aligned selector with optimal parameters to avoid any deterioration of RRAM cell performance. We investigate the possibilities of using a tunnel diode based on single- and double-layer dielectrics and determine their optimal physical properties to be used in an HfOx-based RRAM Crossbar array.

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Section: Methodsmentioning

confidence: 99%

Section: Methodsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Modeling of Self-Aligned Selector Based on Ultra-Thin Metal Oxide for Resistive Random-Access Memory (RRAM) Crossbar Arrays

Fedotov,

Korotitsky,

Koveshnikov

2024

Nanomaterials

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“…[49][50][51][52] 1S1R device structure is considered as the most preferable scheme for high-density 3D integration of RRAM. [34,35,[53][54][55] The ideal selector should have high conductance at a large voltage (on state) and small current (off state) at low voltage simultaneously or a highly nonlinear IÀV characteristic, [56][57][58] as well as a small variation of threshold voltage and hold voltage. [59,60] Moreover, the selectors should be compatible with the memory cell, in terms of operating current and voltage ranges, to ensure limited sneak-path current from the unselected memory elements during both read and write operations, [34,35] as well as enough current to "set" and "reset" memristors.…”

Section: Solutions To the Sneak-path Current Problem In Crossbar Arraysmentioning

confidence: 99%

Memristive Crossbar Arrays for Storage and Computing Applications

Wang

Zhang

et al. 2021

Advanced Intelligent Systems

109

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The emergence of memristors with potential applications in data storage and artificial intelligence has attracted wide attentions. Memristors are assembled in crossbar arrays with data bits encoded by the resistance of individual cells. Despite the proposed high density and excellent scalability, the sneak‐path current causing cross interference impedes their practical applications. Therefore, developing novel architectures to mitigate sneak‐path current and improve efficiency, reliability, and stability may benefit next‐generation storage‐class memory (SCM). Moreover, conventional digital computers face the von‐Neumann bottleneck and the slowdown of transistors’ scaling, imposing a big challenge to hardware artificial intelligence. Memristive crossbar features colocation of memory and processing units, as well as superior scalability, making it a promising candidate for hardware accelerating machine learning and neuromorphic computing. Herein, first, crossbar architecture is introduced. Then, for storage, the origin of sneak‐path current is reviewed and techniques to mitigate this issue from the angle of materials and circuits are discussed. Computing wise, the applications of memristive crossbars in both machine learning and neuromorphic computing are surveyed, focusing on the structure of unit cells, the network topology, and the learning types. Finally, a perspective on future engineering and applications of memristive crossbars is discussed.

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