Resist Residue in Ion Implantation Level Lithography

Abstract

We report the analysis of residual resist remaining after implantation level lithography on the topographical substrate. The problem experienced in a 45-nm-node complementary metal–oxide–semiconductor (CMOS) is described. From our experiment and simulation study, we found that switching exposure wavelength from argon fluoride (ArF) excimer lasers to krypton fluoride (KrF) excimer lasers ameliorates the issue of residual resist on gate stack substrates. In lithography over device stack such as gates, resolution cannot be explained by the Rayleigh equation's k 1. However, for the 32 nm node and below, ArF imaging has to be applied at ion implantation levels in view of the required resolution for a given mask layout. Therefore, we used a three-dimensional (3D) lithography simulator in order to clarify the mechanism of residual resist. From the analysis, the absorption of exposure light by sidewall materials is considered to be the reason for the residual resist. For the post-gate lithography at the ion implantation level, it is necessary to consider not only the resolution of the mask layout but the absorption of exposure light.