Residuals reduction in imaging-based overlay using color per layer

Abstract

As the semiconductor industry rapidly approaches the 3nm lithography node, on-product overlay (OPO) requirements have become tighter, which drives metrology performance enhancements to meet the reduction in overlay (OVL) residuals. The utilization of multiple measurement wavelengths in Imaging- Based Overlay (IBO) has increased in the past few years to meet these needs. Specifically, the color per layer (CPL) method allows for optimizing the OVL measurement conditions per layer, including focus, light, wavelength (WL), and polarization customization which enhance the metrology results. CPL is applicable for multiple technology segments (logic, foundry, DRAM, 3D NAND), relevant for different devices (DRAM high stack layers, NAND channel holes, etc.), and can work well for both thin and thick layers for standard and EUV lithography processes. In this paper, we will review the benefits of CPL for multiple DRAM and NAND critical layers. We will describe how CPL can contribute to measurement accuracy by quantifying the OVL residual reduction in comparison to single-wavelength (SWL) measurement conditions.

Small pitch overlay imaging metrology targets for tight OPO control

“…OVL accuracy improvement is an endless quest to support OPO reduction which is heading to sub 2nm OPO. Imagingbased OVL (IBO) has made significant accuracy improvements in the last years with the introduction of new metrology tool capabilities coupled with new OVL targets such as robust AIM (rAIM ® ) and color per layer AIM (CPL AIM) [3]- [8]. Both of these OVL targets are optimized in the initial technology development phase and implemented in high-volume manufacturing (HVM).…”

NZO reduction via small pitch imaging-based overlay targets

“…AIM targets with periodic patterns, in either vertical or parallel patterns, can be resolvable within visible microscopy. These periodic patterns with enhanced information content are robust to process variation and could be optimized per process layer [3]- [4]. rAIM targets, shown in Figure 1, utilize a smaller pitch compared to AIM targets which typically leads to a more device-like pattern and improves the process compatibility and robustness, lowers the residual, and has better accuracy [5]- [8].…”