Research and Development of Parylene Thin-Film Deposition and Application for Water-Proofing

Kuo, Wen Cheng; Hsu, Chao Yang

doi:10.4028/www.scientific.net/amr.538-541.23

Cited by 1 publication

(1 citation statement)

References 5 publications

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“…However, the thickness of deposited films is sensitive to the locations of samples in a vacuum chamber, since it is difficult to make the distribution of parylene monomer identical everywhere in the chamber. To mitigate this effect, baffles have been used and designed with the numerical simulation of monomer distribution for parylene coaters to control the gas flowing behavior, as well as other vacuum deposition systems [24][25][26]. Besides baffle designs, most parylene-C coaters are designed with a one-dimensional (1D) rotation system for samples to move around the chamber in horizontal planes during deposition (figure 1(a)) [27].…”

Section: Introductionmentioning

confidence: 99%

Ferris-wheel-assisted parylene-C dielectric deposition for improving organic thin-film transistor uniformity

Guo¹,

Geng²,

Zhong³

et al. 2022

Flex. Print. Electron.

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Organic thin film transistor is one of the most promising electronic device technologies for flexible and printed electronics, but device uniformity remains a challenge for large-scale integration circuit design. Despite the advances in semiconductor layers, the quality of dielectric layers is equally important. Parylene-C dielectric has good intrasample thickness uniformity, but demonstrates significant variation among samples fabricated at the same time, thus causing device non-uniformity. In this study, we present a two-dimensional (2D) sample rotation method using a Ferris wheel to improve the thickness uniformity of parylene-C dielectrics. The Ferris wheel averages the deposition rate of parylene-C dielectric on different samples over an identical spherical space, rather than over different horizontal planes by the conventional one-dimensional sample rotation with a rack. The dielectrics fabricated on different cabins of the Ferris wheel demonstrate better thickness uniformity than those fabricated on different floors of the rack, and thus better uniformity of transistors. Specifically, using the 2D rotation Ferris wheel, the coefficient of variation of dielectric thickness is lowered to 0.01 from 0.12 (which uses the conventional rack); the coefficients of variation for the on-state drain current, process transconductance parameter, and threshold voltage of the fabricated transistors are improved to 0.15, 0.16 and 0.08, from 0.33, 0.20 and 0.14, respectively. The improved device uniformity has the potential in complicated flexible circuit design for advanced applications such as edge intelligence.

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