REoN: A protocol for reliable software-defined FPGA partial reconfiguration over network

Mishra, Vishram; Chen, Qianqiao; Zervas, Georgios

doi:10.1109/reconfig.2016.7857184

Cited by 9 publications

(1 citation statement)

References 14 publications

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“…In [7,9] use as encryption algorithm Output Feedback (OFB) and [8] uses Cipher Feedback (CBC). In [28], algorithms implemented in the FPGA to manage Ethernet frames are used, but no encryption method is used. In the proposed work the processing of the frames is performed using algorithms implemented in the FPGA, this approach allows reducing the resource usage and the processing time of the Ethernet frames.…”

Section: Comparison With Existing Schemesmentioning

confidence: 99%

Secure Protocol and IP Core for Configuration of Networking Hardware IPs in the Smart Grid

Urbina

Moreira

Rodríguez³

et al. 2018

Energies

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Nowadays, the incorporation and constant evolution of communication networks in the electricity sector have given rise to the so-called Smart Grid, which is why it is necessary to have devices that are capable of managing new communication protocols, guaranteeing the strict requirements of processing required by the electricity sector. In this context, intelligent electronic devices (IEDs) with network architectures are currently available to meet the communication, real-time processing and interoperability requirements of the Smart Grid. The new generation IEDs include an Field Programmable Gate Array (FPGA), to support specialized networking switching architectures for the electric sector, as the IEEE 1588-aware High-availability Seamless Redundancy/Parallel Redundancy Protocol (HSR/PRP). Another advantage to using an FPGA is the ability to update or reconfigure the design to support new requirements that are being raised to the standards (IEC 61850). The update of the architecture implemented in the FPGA can be done remotely, but it is necessary to establish a cyber security mechanism since the communication link generates vulnerability in the case the attacker gains physical access to the network. The research presented in this paper proposes a secure protocol and Intellectual Property (IP) core for configuring and monitoring the networking IPs implemented in a Field Programmable Gate Array (FPGA). The FPGA based implementation proposed overcomes this issue using a light Layer-2 protocol fully implemented on hardware and protected by strong cryptographic algorithms (AES-GCM), defined in the IEC 61850-90-5 standard. The proposed secure protocol and IP core are applicable in any field where remote configuration over Ethernet is required for IP cores in FPGAs. In this paper, the proposal is validated in communications hardware for Smart Grids.

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