Reliability of Wafer Level Chip Scale Packages

Rongen, R.T.H.; Roucou, R.; Wel, P. J. vd; Voogt, F. C.; Swartjes, F.H.M.; Weide‐Zaage, Kirsten

doi:10.1016/j.microrel.2014.07.012

Cited by 12 publications

(3 citation statements)

References 5 publications

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“…Once the crack occurs within the IMC, the package electrical interconnection is affected and the package function may be failure. However, the IMC effect on packages with less material composition is minor such as pure silicon wafers, stacked chips and wafer level packages [8,9].…”

Section: Introductionmentioning

confidence: 99%

Thermal test effect on fan-out wafer level package strength

Zhong

Choi

2017

2017 12th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)

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Fan-out wafer level packaging technology becomes more and more popular and attractive of its flexibility for integration of diverse devices in a very small form factor and it is also a cost effective packaging solution. As fan-out wafer level package (FOWLP) is composed of various materials, the proper structural design and material selection are essential to achieve reliability requirements. In this study, FOWLP material especially the epoxy molding compound (EMC) thermal properties are evaluated to understand the effect of thermal factors on EMC strength. The long term thermal test is applied and the EMC flexure strength increases significantly after the high temperature storage test.

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Section: Introductionmentioning

confidence: 99%

Thermal test effect on fan-out wafer level package strength

Zhong

Choi

2017

2017 12th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)

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“…Preconditioning is mandatory for Surface Mounted Devices (SMD) prior to environmental reliability tests [3], like Temperature Cycling (TC) [4] and Highly Accelerated Stress Test (HAST). It simulates the real life aspects of the devices from the moment they are manufactured at the component supplier until PCB assembly at the component user.…”

Section: Introductionmentioning

confidence: 99%

Moisture absorption and desorption in wafer level chip scale packages

Rongen

Mavinkurve

Chen³

et al. 2015

Microelectronics Reliability

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“…There are seven kinds of HTS test condition [160], and they are listed in Table 2 crack once it is filled up with IMC platelets. However, the IMC effect on packages with less material composition is minor such as pure silicon wafers [172], stacked chips [173] and wafer level packages [174,175].…”

Section: Condition Temperature (℃)mentioning

confidence: 99%

Advanced flip chip and wafer level packages for 2.5D and 3D IC package technology

Xu¹

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The demand of electronic product explodes in recent years, and the trend of electronic product is portable, multifunctional and budget currently. The fan-out wafer level packaging technology is a kind of wafer level packaging technology, and it becomes more and more attractive and popular because of its flexibility to integrate diverse devices in a very small form factor. The fan-out wafer level packaging technology has the advantages of high density of input/output, minimal package size and low cost. The fan-out wafer level package (FOWLP) is usually used to volume sensitive devices such as mobile phones and wearables. However, the strength of ultrathin FOWLP is low, and the low package strength often leads to crack issues. Therefore, the study of strength behavior of FOWLP is essential. FOWLP is made up of various materials and thus the proper structure design and material selection are important to meet the reliability requirement. The FOWLP strength is evaluated by the experimental method and numerical method. We confirm three significant characteristics of FOWLP strength from the experimental work. The wafer grinding process, FOWLP dimension and thermal factor affect the FOWLP strength significantly. The numerical work proves that the flexure strength of over-molded structure FOWLP is higher than the flexure strength of other structure FOWLPs with the same package thickness. Two theoretical models of FOWLP strength are proposed. These two models are based on the location of FOWLP initial fracture point. The comparison of FOWLP strength model with experiment results and simulation results shows that they are identical. A new theoretical model of FOWLP fatigue crack growth is proposed. This model additionally considers the effect of thermal factor on the FOWLP fatigue crack growth. ii ACKNOWLEDGMENT The author would like to express his gratitude to the people who have given their hands throughout the author's Ph.D. study journey. The author's thanks and appreciations also extend to: Associate Professor Zhong Zhaowei, the author's supervisor. He shows his generosity, encouragement and patience in guiding the author in various aspects during the Ph.D. study. He is also always trying to motivate and encourage the author to reach his goal. Dr. Choi Won Kyoung, the author's co-supervisor. She shows her attention, suggestion and guidance to the author. She also shares a lot of her knowledge and experience on the aspect of advanced packaging with the author. She is also always explaining the author's doubts throughout the project. Ms. Heng Chee Hoon, NTU biological laboratory assistant manager, Mr. Leong Kwok Phui, NTU materials laboratory manager and Ms. Yeong Peng Neo, NTU materials laboratory Executive. They show their generosity and patience in guiding and teaching the author to use the laboratory machines. They also provide the technical support to the author's experiment from hardware to software. Ms. Lee Koon Fong, mechatronics laboratory manager. She kindly and tremendously helps the author to purchase necess...

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Reliability of Wafer Level Chip Scale Packages

Cited by 12 publications

References 5 publications

Thermal test effect on fan-out wafer level package strength

Thermal test effect on fan-out wafer level package strength

Moisture absorption and desorption in wafer level chip scale packages

Advanced flip chip and wafer level packages for 2.5D and 3D IC package technology

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