Reliability of neuronal information conveyed by unreliable neuristor-based leaky integrate-and-fire neurons: a model study

Abstract

We conducted simulations on the neuronal behavior of neuristor-based leaky integrate-and-fire (NLIF) neurons. The phase-plane analysis on the NLIF neuron highlights its spiking dynamics – determined by two nullclines conditional on the variables on the plane. Particular emphasis was placed on the operational noise arising from the variability of the threshold switching behavior in the neuron on each switching event. As a consequence, we found that the NLIF neuron exhibits a Poisson-like noise in spiking, delimiting the reliability of the information conveyed by individual NLIF neurons. To highlight neuronal information coding at a higher level, a population of noisy NLIF neurons was analyzed in regard to probability of successful information decoding given the Poisson-like noise of each neuron. The result demonstrates highly probable success in decoding in spite of large variability – due to the variability of the threshold switching behavior – of individual neurons.

Information Processing in Neuron with Exponential Distributed Delay

“…al. [22] has suggested a mechanism for hardware level implementation of artificial neural network (ANN) which can further be experimented in EDD.…”

Temporal Information Processing and Stability Analysis of the MHSN Neuron Model in DDF

“…InTRoducTIon T he human brain is the most complex dynamical system with 11 th order of neuron and 15 th order of total synaptic connections among themselves [1,2,3,4]. Researchers are involve in understanding the biophysical dynamics and information processing functionality of the brain since last six decades, so that an artificial brain like structure can be implemented at software as well as at hardware level [5,6,7,8,9,10,11,12]. Hardware level implementation of the artificial brain lies in the domain of Neuromorphic engineering in which one implements few functionality of a real neuron on a chip [9,13].…”

“…Researchers are involve in understanding the biophysical dynamics and information processing functionality of the brain since last six decades, so that an artificial brain like structure can be implemented at software as well as at hardware level [5,6,7,8,9,10,11,12]. Hardware level implementation of the artificial brain lies in the domain of Neuromorphic engineering in which one implements few functionality of a real neuron on a chip [9,13]. Integrate-andfire (IF), leaky integrate-and-fire (LIF) and hybrid spiking neuron models are suitable choice for chip level implementation due to their simple mathematical treatment [3,9,13,14].…”

“…Hardware level implementation of the artificial brain lies in the domain of Neuromorphic engineering in which one implements few functionality of a real neuron on a chip [9,13]. Integrate-andfire (IF), leaky integrate-and-fire (LIF) and hybrid spiking neuron models are suitable choice for chip level implementation due to their simple mathematical treatment [3,9,13,14]. These neuron models are threshold based models [8,15,16].…”

“…For hardware level implementation of a threshold based neuron model, one has to focus on two prime issues, namely, (i) How to implement the reset condition of membrane potential after spiking activity? (ii) How to maintain the threshold value and control the variability of threshold value due to the rise in temperature of the chip [3,5,9,17]. Izhikevich two dimensional hybrid spiking neuron model has the mechanism to overcome the first issue at its hardware level implementation [3].…”