Reliability-Driven Task Mapping for Lifetime Extension of Networks-on-Chip Based Multiprocessor Systems

Abstract

Abstract-Shrinking transistor geometries, aggressive voltage scaling and higher operating frequencies have negatively impacted the lifetime reliability of embedded multi-core systems. In this paper, a convex optimization-based task-mapping technique is proposed to extend the lifetime of a multiprocessor systems-onchip (MPSoCs). The proposed technique generates mappings for every application enabled on the platform with variable number of cores. Based on these results, a novel 3D-optimization technique is developed to distribute the cores of an MPSoC among multiple applications enabled simultaneously. Additionally, reliability of the underlying network-on-chip links is also addressed by incorporating aging of links in the objective function. Our formulations are developed for directed acyclic graphs (DAGs) and synchronous dataflow graphs (SDFGs), making our approach applicable for streaming as well as non-streaming applications. Experiments conducted with synthetic and real-life application graphs demonstrate that the proposed approach extends the lifetime of an MPSoC by more than 30% when applications are enabled individually as well as in tandem.

Reliability and Energy-Aware Mapping and Scheduling of Multimedia Applications on Multiprocessor Systems

“…In comparison with the temperature model of [3] and [5], the proposed model improves the MTTF estimation efficiency by an average 21%. Although not explicitly shown here, despite of the HotSpot tool being accurate, the inclusion of the same in the design space exploration leads to an exponential execution time.…”

“…The reliability profiles are shifted to account for the aging already encountered in the cores. The time-tofailure for all the cores are determined using Equation 5. The minimum time corresponds to the failure of the most stressed core.…”

“…These temperature data are stored in a lookup table, and used with a simulated annealing-based heuristic to determine the task mapping that maximizes the lifetime reliability of multiprocessor systems. A convex optimization approach is proposed as an alternative to simulated annealing in [5]. Although these approaches determine the impact of mapping and scheduling on the lifetime reliability, the energy savings and the lifetime improvement obtained jointly, using DVFS, is not explored.…”

“…Figure 11 plots the energy and reliability results of the proposed approach in comparison to the existing reliability-energy joint optimization technique of [8] for six real-life application. Additionally, to determine the reliability benefit of the dynamic voltage and frequency scaling, these two techniques are compared with the highest MTTF technique of [5] (referred to as MMax), which determines MTTF by solving a convex optimization problem. These results are represented as three bars corresponding to each application.…”

“…This has attracted significant attention both in the industry and academia to investigate platformbased design approaches, which involve system-level techniques such as mapping and scheduling of applications on a given multiprocessor platform to mitigate wear-out leading to an extended mean time to failure (MTTF) [2]- [5]. These studies do not minimize energy consumption, which is also crucial for battery-operated embedded devices.…”