Reliability Demonstration of a Ferroelectric Random Access Memory Embedded within a 130nm CMOS Process

Rodríguez, J. A.; Remack, K.; Gertas, J.; Boku, K.; Udayakumar, K. R.; Summerfelt, Scott R.; Shinn, G.; Madan, Siddharth; McAdams, H.; Moïse, T. S.; Eliason, J.; Bailey, R.; Depner, M.; Kim, D.; Staubs, P.

doi:10.1109/nvmt.2007.4389948

Cited by 5 publications

(3 citation statements)

References 2 publications

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“…The nonswitched polarization remains constant. Both of these trends are consistent with the measured results reported previously in an FRAM device [14]. The good match between the model, the capacitor bake data and the FRAM device gives confidence the calibrated SPICE model can be used to accurately simulate the imprint effects during FRAM circuit design.…”

Section: B Modeling and Simulationsupporting

confidence: 89%

Scaling reliability and modeling of ferroelectric capacitors

Acosta

Rodríguez

Obradovic

et al. 2010

2010 IEEE International Reliability Physics Symposium

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We report on reliability properties of MOCVD PZT ferroelectric capacitors as a function of film thickness. Data is presented for fatigue, thermal depolarization, and imprint. It is important to be able to model these parameters as they can significantly affect the switching polarization, which in turn affects the signal margin of an FRAM circuit. A ferroelectric SPICE model is presented that can be used to accurately simulate hysteresis and switching polarization behavior. This model agrees with experimental data and can be used to simulate FRAM circuit behavior through "end of life".Embedded ferroelectric random access memory (FRAM) has become a viable non-volatile memory (NVM) for applications requiring low power consumption, fast write times, and high cycling endurance [1][2][3]. Over the past decade the technology has progressed to the point that high density ferroelectric memory is currently in production at the 130-nm node [4]. Further scaling of the technology can enable an increase in storage capacity leading to new applications for FRAM [5]. However, there are several challenges that must first be overcome. The success of FRAM as a commercial non-volatile memory has been largely due to its integration into complementary metal-oxide-semiconductor (CMOS) technology. Therefore, FRAM must be able to scale along with CMOS technology if it is to continue as a practical NVM. One challenge is to maintain the reliability properties of the ferroelectric capacitor as the PZT thickness is scaled. These include the polarization loss due to read/write cycling, or fatigue, and data retention [6]. Data retention can be significantly affected by thermal depolarization (TD). This effect causes the polarization in a ferroelectric capacitor to decrease as the ambient temperature increases toward the Curie point [6].Also, as FRAM technology advances further, there is a need to design FRAM memory circuits that achieve the required performance and target reliability specifications. Thus, an additional challenge lies in the development of accurate models that can be used to simulate the hysteresis and switching properties of ferroelectric capacitors, including the effects of relaxation, imprint and thermal depolarization.In this work we report on FRAM capacitor reliability properties as a function of thickness scaling. Experimental data is presented which shows the effects of film thickness, fatigue, thermal depolarization, and imprint on ferroelectric capacitor behavior. These results indicate a need for an accurate model that can be used to simulate FRAM signal margin. A ferroelectric SPICE model based on a modified Preisach model (for hysteresis effect) is also presented, including a procedure for modeling the FRAM circuit reliability. Simulation results using our model closely resemble those obtained experimentally. I. EXPERIMENTAL DETAILS A. Device FabricationThe ferroelectric capacitors studied were processed with PZT thicknesses of 50-nm, 60-nm, 70-nm, and 90-nm. The 70-nm and 90-nm thick capacitors were fully integrated...

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Section: B Modeling and Simulationsupporting

confidence: 89%

Scaling reliability and modeling of ferroelectric capacitors

Acosta

Rodríguez

Obradovic

et al. 2010

2010 IEEE International Reliability Physics Symposium

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“…The imprint reduces the switchable polarization, which in turn lowers the signal margin in the circuit via a reduction of the '1' signal. The '0' signal is fairly stable in after-pulse sensing architectures [8], [10]. After a period of time at high temperature, e.g., 1,000 hours at 125°C, the '1' signal magnitude can decrease, illustrated in Fig.…”

Section: ) Thermal Depolarization (Td)mentioning

confidence: 97%

Reliability of Ferroelectric Random Access memory embedded within 130nm CMOS

Rodriguez

Remack

Gertas

et al. 2010

2010 IEEE International Reliability Physics Symposium

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“…A similar test on Sr:HfO 2 was reported in 2014 [201] . Phase jumps of high order harmonics were found to indicate the redistribution of defects during wake-up or fatigue [202] .…”

Section: (5) Harmonic Analysismentioning

confidence: 99%

Ferroelectricity of hafnium oxide-based materials: Current status and future prospects from physical mechanisms to device applications

Yang¹,

Yu²,

Li³

et al. 2023

J. Semicond.

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The finding of the robust ferroelectricity in HfO2-based thin films is fantastic from the view point of both the fundamentals and the applications. In this review article, the current research status of the future prospects for the ferroelectric HfO2-based thin films and devices are presented from fundamentals to applications. The related issues are discussed, which include: 1) The ferroelectric characteristics observed in HfO2-based films and devices associated with the factors of dopant, strain, interface, thickness, defect, fabrication condition, and more; 2) physical understanding on the observed ferroelectric behaviors by the density functional theory (DFT)-based theory calculations; 3) the characterizations of microscopic and macroscopic features by transmission electron microscopes-based and electrical properties-based techniques; 4) modeling and simulations, 5) the performance optimizations, and 6) the applications of some ferroelectric-based devices such as ferroelectric random access memory, ferroelectric-based field effect transistors, and the ferroelectric tunnel junction for the novel information processing systems.

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Reliability Demonstration of a Ferroelectric Random Access Memory Embedded within a 130nm CMOS Process

Cited by 5 publications

References 2 publications

Scaling reliability and modeling of ferroelectric capacitors

Scaling reliability and modeling of ferroelectric capacitors

Reliability of Ferroelectric Random Access memory embedded within 130nm CMOS

Ferroelectricity of hafnium oxide-based materials: Current status and future prospects from physical mechanisms to device applications

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