Reliability characterization of 32nm high-k metal gate SOI technology with embedded DRAM

Mittl, S.; Swift, Ann; Wu, Ernest Y.; Ioannou, D.P.; Chen, Fen; Massey, G.W.; Rahim, Nilufa; Hauser, M.; Hyde, P.; Lukaitis, J.; Rauch, S.E.; Saroop, Sudesh; Wang, Yanfeng

doi:10.1109/irps.2012.6241866

Cited by 2 publications

(1 citation statement)

References 3 publications

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“…The apparent lifetime activation energy, Ea/n, at lower temperatures does approach the classical 0.1 eV range but the local Ea/n at higher temperatures can exceed 0.65eV in the PFETs. These types of elevated activation energies have been reported by others [8] [12]. With HCI stress data from devices with high local temperatures, use of the Arrhenius model with a single high Ea/n extracted at high temperature results in significant over estimation of lifetime at typical use temperatures while use of traditional low temperature Ea/n, such as 0.1 eV, results in significant under estimation of lifetime at use temperatures.…”

Section: Self Heatingsupporting

confidence: 60%

Self-heating and its implications on hot carrier reliability evaluations

Mittl

Guarin

2015

2015 IEEE International Reliability Physics Symposium

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Device level Self-Heating (SH) is becoming a limiting factor during traditional DC Hot Carrier stresses in bulk and SOI technologies. Consideration is given to device layout and design for Self-Heating minimization during HCI stress in SOI technologies, the effect of SH on activation energy (Ea) and the SH induced enhancement to degradation. Applying a methodology for SH temperature correction of extracted device lifetime, correlation is established between DC device level stress and AC device stress using a specially designed ring oscillator.

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Section: Self Heatingsupporting

confidence: 60%