Relation between hot-carrier light emission and kink effect in poly-Si thin film transistors

Koyanagi, Mitsumasa; Kurino, Hiroyuki; Hashimoto, Takahiro; Mori, Hiroki; Hata, Kiyomi; Hiruma, Y.; Fujimori, Takahiro; Wu, I‐Wei; Lewis, A.G.

doi:10.1109/iedm.1991.235405

Cited by 13 publications

(5 citation statements)

References 0 publications

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…It is widely known that a kink current originates from impact ionization near the drain junction. 28) Then, to certify the existence of electron trapped charges in the interface region between the gate insulator and the poly-Si active layer in the short-channel poly-Si TFTs, the normal and drain-source swapped sweep modes of current versus voltage (I-V ) measurement after hot-carrier stress were employed, as shown in Fig. 4.…”

Section: Resultsmentioning

confidence: 99%

Hot-Carrier Effects in Short Channel (L = 1.5 µm) p-Type Polycrystalline Silicon Thin-Film Transistors

Choi¹,

Kim

et al. 2012

Jpn. J. Appl. Phys.

View full text Add to dashboard Cite

We have investigated the reliability of short-channel (L = 1.5 µm) p-type excimer-laser-annealed (ELA) polycrystalline silicon (poly-Si) TFTs under hot-carrier related static bias stress. The threshold voltage (ΔV TH = 0.59 V) of short-channel TFTs (L = 1.5 µm) was significantly more shifted to the positive direction than that (ΔV TH = 0.02 V) of long-channel TFTs (L = 7 µm) under the same stress condition for 100 s. This positive shift of threshold voltage may be attributed to electron trapping at the interface between the poly-Si film and the gate oxide layer. In addition, we have extracted the length of the drain extension from an equation of the pseudo-lightly doped drain (LDD) model to verify the existence of free hole charges induced near the drain junction. The transfer characteristics of the normal and drain-source swapped modes as well as the capacitance–voltage (C–V) characteristics with variation in channel length after the bias stress indicate that the electron trapping at the gate insulator/channel interface mainly occurred near the drain junction region. Furthermore, the threshold voltage of the short-channel ELA poly-Si TFTs with L = 1.5 µm was largely increased as the stress temperature was increased from room temperature to 100 °C, which indicates that the impact ionization occurs more at higher temperature.

show abstract

Section: Resultsmentioning

confidence: 99%

Hot-Carrier Effects in Short Channel (L = 1.5 µm) p-Type Polycrystalline Silicon Thin-Film Transistors

Choi¹,

Kim

et al. 2012

Jpn. J. Appl. Phys.

View full text Add to dashboard Cite

show abstract

“…We must also be careful to eliminate the hot carrier effects and the self-heating effects. The hot carrier effects increase drain current above the kink voltage (V kink ), which is the minimum point in the drain conductance 21) or the maximum point of the channel resistance. 22) The self-heating effects decrease drain current above a certain current density ( j sh ) mainly due to the degradation of the IG mobility caused by rising temperature.…”

Section: Evaluation Methodsmentioning

confidence: 99%

Analysis of Grain Boundary Induced Nonlinear Output Characteristics in Polycrystalline-Silicon Thin-Film Transistors

Ikeda¹

2006

jjap

View full text Add to dashboard Cite

We present the two-loop QCD helicity amplitudes for quark-quark and quarkantiquark scattering. These amplitudes are relevant for next-to-next-to-leading order corrections to (polarized) jet production at hadron colliders. We give the results in the 't Hooft-Veltman and four-dimensional helicity (FDH) variants of dimensional regularization and present the scheme dependence of the results. We verify that the finite remainder, after subtracting the divergences using Catani's formula, are in agreement with previous results. We also provide the amplitudes for gluino-gluino scattering in pure N = 1 supersymmetric Yang-Mills theory. We describe ambiguities in continuing the Dirac algebra to D dimensions, including ones which violate fermion helicity conservation. The finite remainders after subtracting the divergences using Catani's formula, which enter into physical quantities, are free of these ambiguities. We show that in the FDH scheme, for gluino-gluino scattering, the finite remainders satisfy the expected supersymmetry Ward identities. JHEP09(2004)039logarithms [4]. There are also sizable uncertainties associated with the experimental input to the parton distribution functions [5]. Nevertheless, an exact next-to-next-to-leading order (NNLO) computation would be desirable. An important step has recently been accomplished with the computation of the three-loop splitting function by Moch, Vermaseren and Vogt [6]. There has also been some earlier work on global fits to the data [7] within an approximate next-to-next-to-leading order (NNLO) framework [8]. Once combined with the matrix elements in complete programs, this should considerably reduce the renormalization and factorization scale uncertainties in production rates. For a summary of the various expected improvements see, for example, ref. [9].Recent years have seen rapid progress in our ability to compute two-loop matrix elements, especially when there is dependence on more than a single kinematic variable [10]-[23]. Much of this progress has relied on new developments in loop integration [24]-[30] and in understanding the infrared divergences of the theory [31].An NNLO calculation of jet production requires six-point tree-level, one-loop fivepoint amplitudes and two-loop four-point amplitudes. The tree amplitudes for six external partons [32,33] and the one-loop amplitudes for five external partons [34] have been determined some time ago. Anastasiou, Glover, Oleari, and Tejeda-Yeomans have provided the NNLO interferences of the two-loop amplitudes with the tree amplitudes, for all QCD four-parton processes, summed over all external helicities and colors [15]. The helicity amplitudes for gg → gg were presented in ref. [18]. Theqq → gg and qg → qg helicity amplitudes were presented in refs. [21,22]. Recently, while preparing this paper, Glover presented the four-quark helicity amplitudes [23]. Here we present the same amplitudes using somewhat different methods, as well as the N = 1 supersymmetric version of these amplitudes. We also describe ambiguities in the...

show abstract

“…[1][2][3][4] However, the output characteristics exhibit an anomalous increase in current in the saturation regime, often called the "kink" effect by analogy with silicon-on-insulator ͑SOI͒ devices. [5][6][7] This phenomenon can be attributed to the floating-body effect 8 and avalanche multiplication enhanced by grain boundary traps, 6 particularly in n-channel TFTs. With increasing drain voltage, the added drain current enhances impact ionization and the parasitic bipolar junction transistor ͑BJT͒ effect, which leads to a premature breakdown in return.…”

mentioning

confidence: 99%

The Characteristics of n- and p-Channel Poly-Si Thin-Film Transistors with Fully Ni-Salicided S/D and Gate Structure

Kuo¹,

Huang²,

Lue³

et al. 2010

J. Electrochem. Soc.

View full text Add to dashboard Cite

n-and p-channel poly-Si thin-film transistors with fully Ni-self-aligned silicided ͑fully Ni-salicided͒ source/drain ͑S/D͒ and gate structure ͑n-and p-channel FUSA-TFTs͒ have been successfully fabricated on a 40 nm thick channel layer. The conventional poly-Si gate is replaced by the fully Ni-silicided gate, and the parasitic S/D resistance of the FUSA-TFTs is significantly reduced by the fully Ni-silicided S/D structure. The fully Ni-salicidation process is executed at a low temperature of 500°C for a short rapid thermal annealing time. Experimental results show that the FUSA-TFTs give increased on/off current ratio, improved subthreshold characteristics, less threshold voltage roll-off, lower parasitic S/D resistance, higher gate capacitance, and larger field-effect mobility than conventional TFTs. The FUSA-TFTs effectively suppress the floating-body effect and parasitic bipolar junction transistor action. The characteristics of the FUSA-TFTs are suitable for three-dimensional integration applications and high performance driver circuits in the active-matrix liquid crystal displays.Polycrystalline silicon thin-film transistors ͑poly-Si TFTs͒ have been widely used in many potential applications including threedimensional ͑3D͒ integration high density flash memories, pixel driving elements in active-matrix organic light emitting diodes and integrated peripheral driving circuits, and addressing elements of active-matrix liquid crystal displays ͑AMLCDs͒. 1-4 However, the output characteristics exhibit an anomalous increase in current in the saturation regime, often called the "kink" effect by analogy with silicon-on-insulator ͑SOI͒ devices. 5-7 This phenomenon can be attributed to the floating-body effect 8 and avalanche multiplication enhanced by grain boundary traps, 6 particularly in n-channel TFTs. With increasing drain voltage, the added drain current enhances impact ionization and the parasitic bipolar junction transistor ͑BJT͒ effect, which leads to a premature breakdown in return. 8 In the floating-body thin-film devices, the improved parasitic BJT effect can be achieved by using deep salicidation and a fully silicided source/drain ͑S/D͒ structure. 9,10 Due to low hole field-effect mobility, p-channel TFTs have a lower on-state current than n-channel TFTs. Nevertheless, p-channel TFTs have advantages, such as a lower off-state leakage current, slighter floating-body and kink effects, a weaker drain impact ionization, and a higher hot carrier reliability. In addition, thin-channel poly-Si TFTs have better device characteristics such as a small leakage current and a suppressed floating-body effect than thick-channel poly-Si TFTs. 11 However, a thin-channel film also leads to increased parasitic S/D resistance. Parasitic S/D resistances become an increasingly serious issue for thin-channel poly-Si TFTs and SOI devices. Several methods such as self-aligned silicide, selective tungsten-clad and metal-replaced junction technology have been proposed to reduce parasitic S/D resistance in thin-channel SOI devices an...

show abstract

Relation between hot-carrier light emission and kink effect in poly-Si thin film transistors

Cited by 13 publications

References 0 publications

Hot-Carrier Effects in Short Channel (L = 1.5 µm) p-Type Polycrystalline Silicon Thin-Film Transistors

Hot-Carrier Effects in Short Channel (L = 1.5 µm) p-Type Polycrystalline Silicon Thin-Film Transistors

Analysis of Grain Boundary Induced Nonlinear Output Characteristics in Polycrystalline-Silicon Thin-Film Transistors

The Characteristics of n- and p-Channel Poly-Si Thin-Film Transistors with Fully Ni-Salicided S/D and Gate Structure

Contact Info

Product

Resources

About