Reflection high-energy electron diffraction study of molecular beam epitaxy growth of Pr2O3 on Si(0 0 1)

Structure analysis of epitaxial Gd2O3/Si(0 0 1) for high-k gate dielectric applications

“…In this case, the Si atoms reach to the surface. When P O 2 is around 5-6 Â 10 À8 mbar, diffraction patterns due to the two orthogonal cubic domains of Gd 2 O 3 , just as for epitaxial cubic Pr 2 O 3 on Si(0 0 1) [8], are clearly observed. In this system, both cubic domains are [1 0 1] oriented, but the [1 0 1 ] axis of one domain is parallel to Si [11 0] in-plane while the [0 1 0] axis of the other domain is parallel to Si[11 0].…”

Growth of praseodymium oxide and silicate for high-k dielectrics by molecular beam epitaxy

“…NiSi electrodes are fabricated for measuring the electrical properties by using a combination of photolithography and silicidation processes for the top polycrystalline Si layer. [4]. Additional peaks at H ¼ K ¼ 0.90 and 1.83 are clearly observed for samples (a) and (b).…”

“…This result indicates that an interdiffusion of atoms occurs during the nucleation and an initial interfacial layer is formed before the formation of the crystalline Pr 2 O 3 phase. The clear pattern of cubic Pr 2 O 3 due to the two orthogonal cubic domains [4], appears only after the thickness reaches more than 2-3 nm, indicating that the interfacial layer is approximately 2 nm thick at this point. The typical interfacial layer thickness, grown under similar conditions, is reported as 1-2 nm in other works [2,4,11].…”

“…The clear pattern of cubic Pr 2 O 3 due to the two orthogonal cubic domains [4], appears only after the thickness reaches more than 2-3 nm, indicating that the interfacial layer is approximately 2 nm thick at this point. The typical interfacial layer thickness, grown under similar conditions, is reported as 1-2 nm in other works [2,4,11]. In the case of Si addition during growth, the crystalline diffraction pattern begins to appear at a thickness of 0.5 nm.…”

“…In the Pr 2 O 3 /Si(0 0 1) system, amorphous and/or polycrystalline Pr-O-Si silicates form [4,5] that have a lower dielectric constant ($8) [5]. The capacitance of the stacked gate oxide is limited by the layer with the lowest dielectric constant and the carrier mobility in MOSFETs is strongly affected by a rough interface between channel and gate oxide.…”