“…[11] 97.9 not mentioned [12] 97.2 not mentioned [13] 96.6 not mentioned [14] 97.05 not mentioned [15] 92 37.62 7.03 [18] 93. 6 23.84 not mentioned [26] 96.9 not mentioned [27] 97.5 not mentioned [28] 96.5 not mentioned…”
This study presents a new module for cascaded multilevel inverters (MLIs) based on switched-capacitor technique. Charging of the capacitors in the proposed switched-capacitor cell is performed in a self-balancing form. Voltage boosting capability and generating bipolar voltage levels without requiring an end-side H-bridge inverter are remarkable benefits of the proposed topology. Thereby, semiconductors with lower-voltage ratings are applied in its circuit. Comparison of the proposed inverter with traditional topologies and other recently introduced MLIs shows that the proposed topology reduces the number of circuit elements and also total blocking voltage by switches. Moreover, the proposed inverter configuration and its operating principle, capacitance, and power loss calculations, and also topology extension to achieve higher levels are investigated in depth. Finally, an experimental prototype is built to verify the theoretical analysis and feasibility of the proposed topology.
“…[11] 97.9 not mentioned [12] 97.2 not mentioned [13] 96.6 not mentioned [14] 97.05 not mentioned [15] 92 37.62 7.03 [18] 93. 6 23.84 not mentioned [26] 96.9 not mentioned [27] 97.5 not mentioned [28] 96.5 not mentioned…”
This study presents a new module for cascaded multilevel inverters (MLIs) based on switched-capacitor technique. Charging of the capacitors in the proposed switched-capacitor cell is performed in a self-balancing form. Voltage boosting capability and generating bipolar voltage levels without requiring an end-side H-bridge inverter are remarkable benefits of the proposed topology. Thereby, semiconductors with lower-voltage ratings are applied in its circuit. Comparison of the proposed inverter with traditional topologies and other recently introduced MLIs shows that the proposed topology reduces the number of circuit elements and also total blocking voltage by switches. Moreover, the proposed inverter configuration and its operating principle, capacitance, and power loss calculations, and also topology extension to achieve higher levels are investigated in depth. Finally, an experimental prototype is built to verify the theoretical analysis and feasibility of the proposed topology.
“…The proposed topology in comparison with classic and recently introduced topologies has a lower number of switches for the same number of output voltage levels. The comparison of the proposed topology and other symmetric topologies [16][17][18][19][20][21][22][23][24][25][26][27] in terms of switch and driver count for different voltage levels are shown in Figures 10 and 11, respectively. In Figure 10, the slope of every line is proportional to the cost and volume of the converter.…”
Section: Comparisons With Other Structuresmentioning
In this paper, a bidirectional diode containing multilevel inverter is introduced to reduce the number of switching elements especially in the case of a high number of output voltage levels. In comparison with classic and recently introduced symmetrical topologies, which are trying to reduce the switch count, this topology has a lower number of semiconductor switches in the same number of output voltage levels. This makes the proposed inverter to be a suitable choice for medium voltage applications like renewable energy applications as well as medium voltage electric drives. Moreover, it can be used in a cascaded configuration for high voltage levels. To depict the performance of the proposed structure, a comprehensive comparison is made between this topology and classic and recently proposed symmetric topologies in terms of switch and gate driver count, power losses, and cost. The performance of the proposed symmetrical 11-level converter is analyzed and simulated in MATLAB/Simulink for both PWM and selective harmonic elimination switching methods. Not only the results are desirable but also the experimental results of laboratory prototype validate the simulation results.
“…It is suitable for medium-voltage high power applications. A new symmetric cascade multilevel inverters structure is presented in [23]. This structure requires minimum number of power electronic components, gate driver circuits, a power diode, and a dc voltage source.…”
In this paper a basic block of novel topology of multilevel inverter is proposed. The proposed approach significantly requires reduced number of dc voltage sources and power switches to attain maximum number of output voltage levels. By connecting basic blocks in series a cascaded multilevel topology is developed. Each block itself is also a multilevel inverter. Analysis of proposed topology is carried out in symmetric as well as asymmetric operating modes. The topology is investigated through computer simulation using MATLAB/Simulink and validated experimentally on prototype in the laboratory.
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