Reduction of Interrupt Handler Executions for Model Checking Embedded Software

Schlich, Bastian; Noll, Thomas; Brauer, Jörg; Brutschy, Lucas

doi:10.1007/978-3-642-19237-1_5

Cited by 16 publications

(30 citation statements)

References 16 publications

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“…We could show, that our approach is suitable to verify real world applications written for an MSP430 micro-controller platform. For future work we intend to implement a technique for more complex handling of interrupts as described in [12]. Furthermore we want to prove completeness of the verification with a technique like k-induction [13].…”

Section: Discussionmentioning

confidence: 99%

See 1 more Smart Citation

Bounded model checking of Contiki applications

Vörtler

Rulke

Hofstedt

2012

2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits &Amp; Systems (DDECS)

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Verification of embedded systems is a challenge due to the tight combination of hardware and software. We present an approach on the automatic verification of embedded system applications for the operating system Contiki using a standard bounded model checking tool for software. By using an operating system a higher abstraction level to hardware is possible. Our approach is therefore easily applicable for the verification of different hardware platforms

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Section: Discussionmentioning

confidence: 99%

“…An interrupt can occur at any time during the program execution and introduces a kind of parallelism into the system. To model this parallelism [8], [12] propose to insert a call to an interrupt handling function after each C statement. We do not implement one of these approaches.…”

Section: A Replacing Driversmentioning

confidence: 99%

Bounded model checking of Contiki applications

Vörtler

Rulke

Hofstedt

2012

2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits &Amp; Systems (DDECS)

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“…Previous research on formal verification of interrupt-driven programs uses a range of techniques, including program transformation [Kidd et al 2010;Regehr and Cooprider 2007;Wu et al 2013], explicit-state model checking [Schlich et al 2009], bounded model checking [Bucur and Kwiatkowska 2011;Li et al 2013] and predicate abstraction [Witkowski et al 2007]. None of these methods demonstrates effective verification of programs of moderate size with nested interrupts.…”

Section: Related Workmentioning

confidence: 99%

“…Nested interrupts are not allowed. Schlich et al [2009] introduce an abstraction technique for microcontroller assembly code called interrupt handler execution reduction, which is based on partial-order reduction and reduces the number of program locations where an interrupt handler needs to be executed. Yet, they do not handle nested interrupts.…”

Section: Related Workmentioning

confidence: 99%

Effective Verification for Low-Level Software with Competing Interrupts

Liang

Melham

Kroening

et al. 2017

ACM Trans. Embed. Comput. Syst.

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Interrupt-driven software is difficult to test and debug, especially when interrupts can be nested and subject to priorities. Interrupts can arrive at arbitrary times, leading to an exponential blow-up in the number of cases to consider. We present a new formal approach to verifying interrupt-driven software based on symbolic execution. The approach leverages recent advances in the encoding of the execution traces of interacting, concurrent threads. We assess the performance of our method on benchmarks drawn from embedded systems code and device drivers, and experimentally compare it to conventional approaches that use source-to-source transformations. Our results show that our method significantly outperforms these techniques. To the best of our knowledge, our work is the first to demonstrate effective verification of low-level embedded software with nested interrupts.

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“…Traditionally, model checking has been used to verify concurrent programs such as in [9] where partial order reduction is used to increase efficiency. Schlich et al [18] implement this technique for model checking embedded software on the assembly level. Atig et al [1] describe how to model check in the presents of a weak memory model, which corresponds to the lockless programs described in this paper.…”

Section: Related Workmentioning

confidence: 99%

Static Analysis of Lockless Microcontroller C Programs

Beckschulze

Biallas

Kowalewski

2012

Electron. Proc. Theor. Comput. Sci.

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Concurrently accessing shared data without locking is usually a subject to race conditions resulting in inconsistent or corrupted data. However, there are programs operating correctly without locking by exploiting the atomicity of certain operations on a speciﬁc hardware. In this paper, we describe how to precisely analyze lockless microcontroller C programs with interrupts by taking the hardware architecture into account. We evaluate this technique in an octagon-based value range analysis using access-based localization to increase efﬁciency

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Reduction of Interrupt Handler Executions for Model Checking Embedded Software

Cited by 16 publications

References 16 publications

Bounded model checking of Contiki applications

Bounded model checking of Contiki applications

Effective Verification for Low-Level Software with Competing Interrupts

Static Analysis of Lockless Microcontroller C Programs

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