Reduction in area‐specific on‐resistance with vertical stepped doped high‐k<scp>VDMOS</scp>

Parmar, Onika; Gupta, Namrata

doi:10.1002/jnm.2979

Cited by 3 publications

(8 citation statements)

References 21 publications

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“…Carrier‐dependent lifespan, Shockley Read Hall, and high field saturation are the models used, and Selberherr impact ionization is applied for avalanche breakdown. [ 10,13 ] In each case, the default settings are left unaltered. The findings are investigated for various K values.…”

Section: Device Structure and Results Analysismentioning

confidence: 99%

“…[7][8][9] By introducing step doping in HK-VDMOS (high K-vertically diffused metal-oxide semiconductor), O. Parmar et al deduced that the specific on resistance and the current capacity of the stepped doped high-K VDMOS is better than that of HK-VDMOS. [10][11][12] We are providing comparison between switching characteristics of HK (high K) device and SHK (stepped doped High K) device in order to understand the impact of step doping on the switching performance of HK-VDMOS. Analysis has been performed for K values of 5, 10, and 20.…”

Section: Introductionmentioning

confidence: 99%

“…[ 7–9 ] By introducing step doping in HK‐VDMOS (high K ‐vertically diffused metal–oxide semiconductor), O. Parmar et al deduced that the specific on resistance and the current capacity of the stepped doped high‐K VDMOS is better than that of HK‐VDMOS . [ 10–12 ]…”

Section: Introductionmentioning

confidence: 99%

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Stepped Doped High k VDMOS: Switching Characteristics

Shukla

Parmar

Rajput

et al. 2023

Physica Status Solidi (a)

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This paper presents the switching analysis of vertical stepped doped high k VDMOS. The introduction of vertical step doping in the n pillar of HK VDMOS brings improvement in switching performance. All the analysis of proposed and conventional device is carried out using silvaco ATLAS tool. Significant reduction in the switching delay is noted for different values of k. It is observed to be 40% for k = 20, 28.57% for k = 10, and 31.76% for k = 5. So the proposed step doped high k VDMOS can replace the high k VDMOS when fast switching is desired.

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Section: Device Structure and Results Analysismentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Stepped Doped High k VDMOS: Switching Characteristics

Shukla

Parmar

Rajput

et al. 2023

Physica Status Solidi (a)

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“…In recent years, there has been a surge of research and development in vertical GaN devices, as they hold great potential for future power systems with their high BV and high power capabilities. The vertical MOSFET structure has been widely applied in siliconbased power devices, enabling higher current densities and reduced parasitic effects within a smaller chip area [5,6]. Despite the relatively complex manufacturing process, vertical GaN power devices are easier to achieve enhancement mode operation and avalanche breakdown, thus attaining optimal figures of merit (BFOM) [7,8].…”

Section: Introductionmentioning

confidence: 99%

The GaN trench MOSFET with adaptive voltage tolerance achieved through a dual-shielding structure

Qiu,

Wei

2024

Semicond. Sci. Technol.

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A novel GaN trench gate vertical MOSFET (PSGT-MOSFET) with a double-shield structure composed of a separated gate (SG) and a p-type shielding layer (P_shield) is proposed and investigated. The p-type shielding layer (P_shield) is positioned within the drift region, which can suppress the electric field peak at the bottom of the trench during the off state. This helps to prevent premature breakdown of the gate oxide layer. Additionally, the presence of P_shield enables the device to have adaptive voltage withstand characteristics. The separated gate (SG) can convert a portion of gate to- -drain capacitance (Cgd) into drain-to-source capacitance (Cds), significantly reducing the gate-to-drain charge of the device. This improvement in charge distribution helps enhance the switching characteristics of the device. Later, the impact of the position and length of the p-type shielding layer (P_shield) on the breakdown voltage (BV) and specific on-resistance (Ron_sp) was studied. The influence of the position and length of the separated gate (SG) on gate charge (Qgd) and breakdown voltage was also investigated. Through TCAD simulations, the parameters of P_shield and SG were optimized. Compared to conventional GaN TG-MOSFET with the same structural parameters, the gate charge was reduced by 88%. In addition, this paper also discusses the principle of adaptive voltage withstand in PSGT-MOSFET.

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“…However, there is a contradictory relationship between the BV and R on,sp of VDMOS, and R on,sp increases sharply with the increase in BV . In order to alleviate this contradictory relationship, several new structures were proposed [ 3 , 4 , 5 , 6 , 7 , 8 , 9 , 10 , 11 , 12 , 13 , 14 , 15 , 16 , 17 ]. With the advances in the technology, the functions of Si-based power devices are gradually approaching the limits of Si materials.…”

Section: Introductionmentioning

confidence: 99%

GaN/Si Heterojunction VDMOS with High Breakdown Voltage and Low Specific On-Resistance

2023

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A novel VDMOS with the GaN/Si heterojunction (GaN/Si VDMOS) is proposed in this letter to optimize the breakdown voltage (BV) and the specific on-resistance (Ron,sp) by Breakdown Point Transfer (BPT), which transfers the breakdown point from the high-electric-field region to the low-electric-field region and improves the BV compared with conventional Si VDMOS. The results of the TCAD simulation show that the optimized BV of the proposed GaN/Si VDMOS increases from 374 V to 2029 V compared with the conventional Si VDMOS with the same drift region length of 20 μm, and the Ron,sp of 17.2 mΩ·cm2 is lower than 36.5 mΩ·cm2 for the conventional Si VDMOS. Due to the introduction of the GaN/Si heterojunction, the breakdown point is transferred by BPT from the higher-electric-field region with the largest radius of curvature to the low-electric-field region. The interfacial state effects of the GaN/Si are analyzed to guide the fabrication of the GaN/Si heterojunction MOSFETs.

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Reduction in area‐specific on‐resistance with vertical stepped doped high‐kVDMOS

Cited by 3 publications

References 21 publications

Stepped Doped High k VDMOS: Switching Characteristics

Stepped Doped High k VDMOS: Switching Characteristics

The GaN trench MOSFET with adaptive voltage tolerance achieved through a dual-shielding structure

GaN/Si Heterojunction VDMOS with High Breakdown Voltage and Low Specific On-Resistance

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