2019
DOI: 10.1155/2019/4578501
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Reducing the Short Channel Effect of Transistors and Reducing the Size of Analog Circuits

Abstract: Analog integrated circuits never follow the Moore’s Law. This is particularly right for passive component. Due to the Short Channel Effect, we have to implement longer transistor, especially for analog cell. In this paper, we propose a new topology using some advantages of the FDSOI (Fully Depleted Silicon on Insulator) technology in order to reduce the size of analog cells. First, a current mirror was chosen to illustrate and validate a new design. Measured currents, with 35nm transistor length, have validate… Show more

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Cited by 6 publications
(4 citation statements)
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“…Tis P 3 O 5− 10 employed for the reduction of Ag + ion to form Ag °, and fnally several Ag °were aggregated during reduction reaction for the formation of Ag-NPs [103]. Tus, the size of the nanoscale particles was achieved through adjusting the concentrations of ion source, reducing agents, and period of reduction [104,105]. Te maximum absorption peak at 410 nm confrmed that highest Ag-NPs were yielded at 4 h reduction reaction.…”
Section: Discussionmentioning
confidence: 99%
“…Tis P 3 O 5− 10 employed for the reduction of Ag + ion to form Ag °, and fnally several Ag °were aggregated during reduction reaction for the formation of Ag-NPs [103]. Tus, the size of the nanoscale particles was achieved through adjusting the concentrations of ion source, reducing agents, and period of reduction [104,105]. Te maximum absorption peak at 410 nm confrmed that highest Ag-NPs were yielded at 4 h reduction reaction.…”
Section: Discussionmentioning
confidence: 99%
“…Our proposed novel solution involves dynamically biasing the back-gate of FDSOI transistors to counteract the short channel effect, even when V ds is not the same [6]. This approach can be applied to the basic current mirror depicted in Figure 6 by configuring the back-gates of FDSOI transistors, as shown in Figure 7.…”
Section: New Mirror Current Topology Using Fdsoi Technologymentioning
confidence: 99%
“…. ., longer transistors are required, especially for analog cells, as shown in Figure 1 [6]. To address these limitations while reducing the size of the transistors, several mainstream advanced technologies have emerged.…”
Section: Introductionmentioning
confidence: 99%
“…In Figure 7, the drain current variation of FDSOI is shown for different thicknesses of gate oxide [18].…”
Section: Gate Oxide Thickness Variation Of Fdsoimentioning
confidence: 99%