Reducing the Complexity of Fault-Tolerant System Amenable to Approximate Computing

Abstract

Many applications tolerate errors at their outputs. Some examples include image and digital signal processing applications. At the same time these applications are often used in systems that require high degrees of fault-tolerance. Examples include autonomous driving applications. Thus, in this work we propose a method to reduce the complexity of hardware redundant systems that are amenable to approximate computing such that soft errors outside a maximum specified threshold are detected. This leads to the detection of catastrophic errors, while allowing the system to continue functioning when smaller single event upsets (SEU) occur. The proposed method reduces the complexity of the duplicated module by applying a set of approximations in such a way that the output is guaranteed to operate within a given error range with the exact module. Experimental results show that the proposed approach works well and that area saving between 30% and 19% can be achieved on average for different error ranges compared to the traditional exact duplication with compare approaches.