Reducing shift penalty in Domain Wall Memory through register locality

Abstract

General-purpose graphics processing units (GPGPUs) have the ability to execute hundreds to thousands of threads simultaneously. Extreme multithreading requires a large register file to hold state of executing threads and facilitate context switching. As feature size reduces, power consumption in the large register file becomes a major concern.In this work, we exploit Domain Wall Memory (DWM) which is a spin-based memory to reduce power consumption in register file. DWM is a promising technology and offers non-volatility, high energy efficiency, and high density by storing several bits into the domains of a ferromagnetic wire. However, despite of favourable properties of DMW over SRAM technology, DWM poses a unique challenge that the bits must be accessed serially through shift operations, leading to variable and potentially higher access latencies. To address this challenge, we propose a new predictive shift policy. In this policy, we exploit register locality across threads and predict source and destination operands of instructions. We record history of registers accessed by instructions and shift magnetic domains of DWM tracks for subsequent instructions, speculatively. Over a wide range of applications from NVIDIA CUDA SDK, ISPASS, and Rodinia, our predictive scheme achieves dramatic energy saving over an SRAM register file while changing performance negligibly.

Magnetic Racetrack Memory: From Physics to the Cusp of Applications Within a Decade

“…Literature suggests that the most established technique to improve RTM performance without increasing the number of access ports is preshifting [71], [87], [88]. The concept of preshifting is analogous to prefetching which consists in fetching the data of the next likely accessed element in advance.…”

Generalized Data Placement Strategies for Racetrack Memories

“…Many techniques have been proposed in the past to mitigate the negative impact of RTM shift overhead. These include data compression [22], reconfigurability of RTM in terms of deactivating (or activating) rarely (or highly) used domains, runtime data swapping [20], proactively aligning the likely accessed domains to the port positions [1], [12], [20], [21], and intelligent instruction [16] and data placement [2], [5], [7], [8], [11]. Among these proposals, data placement has demonstrated significant benefits with trivial or no overheads.…”

ShiftsReduce

“…Sun et al proposed swapping highly accessed DWs with those closer to the access port(s) [47]. Atoofian proposed a predictor-based proactive shifting by exploiting register locality [1]. Likewise, proactive shifting is performed on the data items waiting in the queue [30].…”