Reduced Reverse Gate Leakage Current for p‐GaN Gate High‐Electron‐Mobility Transistors by a Surface‐Etching Method

Abstract

Herein, the mechanism of increased gate leakage current observed in SiN x -passivated high-resistivity cap layer high-electron-mobility transistors (HRCL-HEMTs) is investigated. The leakage is found to be correlated with the roughened morphology and deviated surface stoichiometry caused by H-plasma treatment. An additional step of surface etching before passivation restores GaN surface and gate leakage is reduced by about two orders of magnitude, whereas the other electrical characteristics of p-GaN HEMTs are preserved.