Recovering from Overload in Multicore Mixed-Criticality Systems

Erickson, Jeremy P.; Kim, Nam Hoon; Anderson, James H.

doi:10.1109/ipdps.2015.120

Cited by 12 publications

(6 citation statements)

References 12 publications

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“…e horizontal axis gives total system utilization. 12 For each utilization, the vertical axis gives the proportion of randomly generated task systems that were schedulable under each considered scheme. For example, the circled point in Fig.…”

Section: Resultsmentioning

confidence: 99%

“…e desire to host real-time workloads on multicore platforms in safety-critical application domains has been stymied by a problem dubbed the "one-out-of-m" problem [12,30]: when certifying the real-time correctness of a system running on m cores, analysis pessimism can be so excessive that the processing capacity of the "additional" m − 1 cores is entirely negated. In e ect, only "one core's worth" of capacity can be utilized even though m cores are available.…”

Section: Introductionmentioning

confidence: 99%

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Supporting I/O and IPC via Fine-Grained OS Isolation for Mixed-Criticality Real-Time Tasks

Kim

Tang

Otterness

et al. 2018

Proceedings of the 26th International Conference on Real-Time Networks and Systems

Self Cite

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E orts towards hosting safety-critical, real-time applications on multicore platforms have been stymied by a problem dubbed the "one-out-of-m" problem: due to excessive analysis pessimism, the overall capacity of an m-core platform can easily be reduced to roughly just one core. e predominant approach for addressing this problem introduces hardware-isolation techniques that ameliorate contention experienced by tasks when accessing shared hardware components, such as DRAM memory or caches. Unfortunately, in work on such techniques, the operating system (OS), which is a key source of potential interference, has been largely ignored. Most real-time OSs do facilitate the use of a coarse-grained partitioning strategy to separate the OS from user-level tasks. However, such a strategy by itself fails to address any data sharing between the OS and tasks, such as when OS services are required for interprocess communication (IPC) or I/O. is paper presents techniques for lessening the impacts of such sharing, speci cally in the context of MC 2 , a hardware-isolation framework designed for mixed-criticality systems. Additionally, it presents the results from micro-benchmark experiments and a large-scale schedulability study conducted to evaluate the e cacy of the proposed techniques and to elucidate sharing vs. isolation tradeo s involving the OS. is is the rst paper to systematically consider such tradeo s and consequent impacts of OS-induced sharing on the one-out-of-m problem. CCS CONCEPTS •Computer systems organization → Multicore architectures; Embedded so ware; Real-time system architecture; •So ware and its engineering → Memory management; Embedded so ware; Realtime schedulability; Communications management;

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Section: Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Supporting I/O and IPC via Fine-Grained OS Isolation for Mixed-Criticality Real-Time Tasks

Kim

Tang

Otterness

et al. 2018

Proceedings of the 26th International Conference on Real-Time Networks and Systems

Self Cite

View full text Add to dashboard Cite

show abstract

“…Resources that are shared among cores such as main memories, memory buses, and caches in their scheduling or analysis may also lead to much pessimism underlying the problem. 81 Chisholm et al 31¯r stly considered tradeo®s on multicore platforms for data sharing, where capacity loss is decreased by using both hardware-management methods 82 and MC con¯guration assumptions, and described a novel implementation of MC2, which extends the previous one by enabling tasks to communicate over shared memory, and o®ers approaches for administrating the DRAM memory banks and LLC. However, these approaches do not include intertask interferences resulting from accessing resources which are shared among cores such as main memories, memory buses, and caches in their scheduling or analysis.…”

Section: Qos-oriented Techniques In MC Systemsmentioning

confidence: 99%

A Review of Recent Techniques in Mixed-Criticality Systems

Chai

Zhang

Sun

et al. 2019

J CIRCUIT SYST COMP

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Unlike traditional embedded systems that almost have only one criticality level, many complex embedded systems nowadays are mixed-critical and are more and more widely used. There has been a lot of research on mixed-criticality (MC) systems. In this paper, we present a survey on the MC systems on these research. First, we discuss the exaltation of the schedulability of MC systems. As improving schedulability may lead to quality-of-service (QoS) reduction of MS systems. Therefore, we investigate the approaches to solve this problem. Improving QoS of MS systems may inevitably increase the energy consumption. Then, we introduce the researches that take the energy efficiency as a design requirement of MC systems. Few MC systems regard fault-tolerance as the design requirement, thus, we extensively investigate fault-tolerance of MC systems. In addition, we introduce some of the main applications for MC systems.

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“…Erickson et al [17] proposed a scheduling framework for multicore mixed criticality systems to recover from transient overload scenarios. The recovery relies on scaling the task inter-release times to reduce the jobs frequency.…”

Section: Related Workmentioning

confidence: 99%

Combining Task-level and System-level Scheduling Modes for Mixed Criticality Systems

Boudjadar

Ramanathan

Easwaran

et al. 2019

2019 IEEE/ACM 23rd International Symposium on Distributed Simulation and Real Time Applications (DS-RT)

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Different scheduling algorithms for mixed criticality systems have been recently proposed. The common denominator of these algorithms is to discard low critical tasks whenever high critical tasks are in lack of computation resources. This is achieved upon a switch of the scheduling mode from Normal to Critical. We distinguish two main categories of the algorithms: system-level mode switch and task-level mode switch. System-level mode algorithms allow low criticality (LC) tasks to execute only in normal mode. Task-level mode switch algorithms enable to switch the mode of an individual high criticality task (HC), from low (LO) to high (HI), to obtain priority over all LC tasks. This paper investigates an online scheduling algorithm for mixedcriticality systems that supports dynamic mode switches for both task level and system level. When a HC task job overruns its LC budget, then only that particular job is switched to HI mode. If the job cannot be accommodated, then the system switches to Critical mode. To accommodate for resource availability of the HC jobs, the LC tasks are degraded by stretching their periods until the Critical mode exhibiting job complete its execution. The stretching will be carried out until the resource availability is met. We have mechanized and implemented the proposed algorithm using Uppaal. To study the efficiency of our scheduling algorithm, we examine a case study and compare our results to the state of the art algorithms.

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Recovering from Overload in Multicore Mixed-Criticality Systems

Cited by 12 publications

References 12 publications

Supporting I/O and IPC via Fine-Grained OS Isolation for Mixed-Criticality Real-Time Tasks

Supporting I/O and IPC via Fine-Grained OS Isolation for Mixed-Criticality Real-Time Tasks

A Review of Recent Techniques in Mixed-Criticality Systems

Combining Task-level and System-level Scheduling Modes for Mixed Criticality Systems

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