Reconfiguring Crypto Hardware Accelerators on Wireless Sensor Nodes

Abstract

Running strong cryptographic algorithms on wireless sensor nodes is extremely difficult due to their limited resources. Hardware accelerators are a suitable means t speed up the computation and reduce power consumption. The drawback of crypto ASICs is the loss of flexibility. In this paper we will shortly introduce a modular design of elliptic curve accelerators which allows to be adjusted to several NIST recommended curves be replacing its reduction unit. This partial reconfiguration will be executed on a Spartan 3 FPGA. The visualization will be done in the following way. Standard motes will be connected to the FPG. On the motes the algorithms will be executed in software. Switching between ECC with a long key i.e. 571bit and those with short key length e.g. to a key length of 163 bit, has a remarkable effect on the execution time. En-/decrypting messages sent to and received from the motes at the FPGA will show that ECC implementation has been reconfigured according to the selected curve on the motes.

A Survey on FPGA-Based Sensor Systems: Towards Intelligent and Reconfigurable Low-Power Sensors for Computer Vision, Control and Signal Processing

“…For that end, dynamic reconfigurable devices such as FPGAs play an important role because they can add flexibility to the sensor node. In this context, an important approach developed in Spain is the Cookie platform [ 4 , 19 , 66 , 67 ], a modular device that has an innovative WSN node architecture. This modular platform is divided into four functional layers: communication, processing, power supply and sensing/actuating layer.…”

“…On the other hand, the FPGA processes the signals coming from sensors. This platform has been tested in processing, power consumption, communication, and encryption with successful results [ 19 , 67 ].…”

“…This system is optimal for high-speed applications where online measurements are needed and the reconfigurability feature is required by a specific application. Compression and cryptography is another important research field of interest [ 18 , 19 ]. Sensor data compression is a technique employed to reduce redundancies in order to decrease data storage and reduce communication costs.…”

Sensor Systems Based on FPGAs and Their Applications: A Survey

“…In this respect, several cryptographic accelerators have been proposed for sensor node architectures based on hyperchaos encryption [25], RC5 [26], involutional block ciphers [27] and implementations of the security suites of the IEEE 802.15.4 standard [28,29] among others. These implementations are described in Section 4.Moreover, dynamic reconfiguration can play a key role into minimizing the obsolescence of cryptographic primitives, as proposed in [30]. Partial reconfiguration can be used in order to change, for instance, the curve parameters of ECC implementations in hardware.…”

“…These implementations are described in Section 4. Moreover, dynamic reconfiguration can play a key role into minimizing the obsolescence of cryptographic primitives, as proposed in [ 30 ]. Partial reconfiguration can be used in order to change, for instance, the curve parameters of ECC implementations in hardware.…”