2010
DOI: 10.1016/j.ijleo.2009.05.027
|View full text |Cite
|
Sign up to set email alerts
|

Reconfigurable mesh-based inter-chip optical interconnection network for distributed-memory multiprocessor system

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1

Citation Types

0
3
0

Year Published

2010
2010
2021
2021

Publication Types

Select...
2
2

Relationship

1
3

Authors

Journals

citations
Cited by 4 publications
(3 citation statements)
references
References 3 publications
0
3
0
Order By: Relevance
“…The architecture of interchip optical interconnects on PCB [2] includes a VCSEL array, a photodiode array and a polymeric channel waveguide array functioning as the physical layer of optical interconnects, as shown in Fig. 1.…”
Section: Architecture Of Waveguide-based Chip-to-chip Optical Intercomentioning
confidence: 99%
See 1 more Smart Citation
“…The architecture of interchip optical interconnects on PCB [2] includes a VCSEL array, a photodiode array and a polymeric channel waveguide array functioning as the physical layer of optical interconnects, as shown in Fig. 1.…”
Section: Architecture Of Waveguide-based Chip-to-chip Optical Intercomentioning
confidence: 99%
“…According to IBM's Terabus project [1], a complete technology set was developed for a terabit per second optical bus for chip-to-chip interconnects on a printed circuit board. The data rate per line would be up to 20 Gbps with 48 parallel channels, leading to an aggregate bit rate approaching 1 Tb/s [2].…”
Section: Introductionmentioning
confidence: 99%
“…Since the WECPAR model is theoretical, we do not go into the details of implementation. For some recent relevant possibilities, see, for example, [23], and for some optical alternatives, see [24], [25].…”
Section: Introductionmentioning
confidence: 99%