Reconfigurable MAC-Based Architecture for Parallel Hardware Implementation on FPGAs of Artificial Neural Networks

Nedjah, Nadia; Silva, Rodrigo Martins; Mourelle, Luiza Macedo; Silva, Marcus Vinícius

doi:10.1007/978-3-540-87559-8_18

Cited by 3 publications

(1 citation statement)

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“…Mathematic operations, such as sums and multiplications, using floating-point numbers require specific routines and, in terms of hardware design, a circuit that needs very large silicon area to be implemented. Also, long computing time is also demanded (Nedjah et al, 2008).…”

Section: Introductionmentioning

confidence: 99%

Compact yet efficient hardware architecture for multilayer-perceptron neural networks

Silva

Mourelle

Nedjah

2011

Sba Controle & Automação

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RESUMOArquitetura de hardware compacta e eficiente para redes neurais artificiais do tipo múltiplas camadas Em termos computacionais, uma rede neural artificial (RNA) pode ser implementada em software ou em hardware, ou ainda de maneira híbrida, combinando ambos os recursos. O presente trabalho propõe uma arquitetura de hardware para a computação de uma rede neural do tipo perceptron com múl-tiplas camadas (MLP). Soluções em hardware tendem a ser mais eficientes do que soluções em software. O projeto em questão, além de explorar fortemente o paralelismo das redes neurais, permite alterações do número de entradas, número de camadas e de neurônios por camada, de modo que diversas aplicações de RNAs possam ser executadas no hardware proposto. Visando a uma redução de tempo do processamento aritmético, um número real é aproximado por uma fração de inteiros. Dessa forma, as operações aritméticas limitam-se a operações inteiras, executadas por circuitos combinacionais. Uma simples máquina de estados é demandada para controlar somas e produtos de frações. A função de ativação usada neste projeto é a sigmóide. Essa função é aproximada mediante o uso de polinômios, cujas operações são regidas por somas e produtos. Um teorema é introduzido e provado, permitindo a fundamentação da estratégia de cálculo da função de ativação. Dessa forma, reaproveita-se o circuito aritmé-tico da soma ponderada para também computar a sigmóide. Essa re-utilização dos recursos levou a uma redução drás-tica de área total de circuito. Após modelagem e simulação para validação do bom funcionamento, a arquitetura proposta foi sintetizada utilizando recursos reconfiguráveis, do tipo FPGA. Os resultados são promissores. PALAVRAS-CHAVE:Redes neurais artificiais, hardware para redes neurais, sigmóide, paralelismo, FPGA. ABSTRACTThere are several neural network implementations using either software, hardware-based or a hardware/software codesign. This work proposes a hardware architecture to implement an artificial neural network (ANN), whose topology is the multilayer perceptron (MLP). In this paper, we explore the parallelism of neural networks and allow on-thefly changes of the number of inputs, number of layers and number of neurons per layer of the net. This reconfigurability characteristic permits that any application of ANNs may be implemented using the proposed hardware. In order to reduce the processing time that is spent in arithmetic computaRevista Controle & Automação/Vol.22 no.6/Novembro e Dezembro 2011 647 tion, a real number is represented using a fraction of integers. In this way, the arithmetics is limited to integer operations, performed by fast combinational circuits. A simple state machine is required to control sums and products of fractions. Sigmoid is used as the activation function in the proposed implementation. It is approximated by polynomials, whose underlying computation requires only sums and products. A theorem is introduced and proven so as to cover the arithmetic strategy of the computation of the activation function. T...

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Section: Introductionmentioning

confidence: 99%

Compact yet efficient hardware architecture for multilayer-perceptron neural networks

Silva

Mourelle

Nedjah

2011

Sba Controle & Automação

Self Cite

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Biophysically Accurate Foating Point Neuroprocessors for Reconfigurable Logic

Zhang

McGeehan

Regan

et al. 2013

IEEE Trans. Comput.

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System of Automatic Microscopic Analysis of Biomaterials for Diagnostics of Oncological Pathologies Using Trained Neural Networks and Telemedical Consultations

Kucherov

Lobanov

Medovy³

et al. 2019

Voprosy radioèlektroniki

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Labor intensity, complexity of morphology, the shortage of qualified specialists do not allow full use of the diagnostic potential of microscopic analysis of biomaterials in mass population surveys. The article discusses the technology of creating an Automatic Scan Microscope Analyzer of Oncological Pathologies (ASMAOP) that uses neural network learning during regular telemedicine consultations with expert evaluation of digital copies of biomaterials produced by a scanning microscope. The scheme of work of ASMAOP in the composition of a telemedicine network, hardware solutions including platform for deep learning are considered. The purpose of creation of ASMAOP is to perform microscopic analyses at the level of the experienced experts with a significant advantage in performance and availability.

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Reconfigurable MAC-Based Architecture for Parallel Hardware Implementation on FPGAs of Artificial Neural Networks

Cited by 3 publications

References 2 publications

Compact yet efficient hardware architecture for multilayer-perceptron neural networks

Compact yet efficient hardware architecture for multilayer-perceptron neural networks

Biophysically Accurate Foating Point Neuroprocessors for Reconfigurable Logic

System of Automatic Microscopic Analysis of Biomaterials for Diagnostics of Oncological Pathologies Using Trained Neural Networks and Telemedical Consultations

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