Recent progresses of NMOS and CMOS logic functions based on two-dimensional semiconductors

Abstract

Metal-oxide-semiconductor field effect transistors (MOSFET) based on two-dimensional (2D) semiconductors have attracted extensive attention owing to their excellent transport properties, atomically thin geometry, and tunable bandgaps. Besides improving the transistor performance of individual device, lots of efforts have been devoted to achieving 2D logic functions or integrated circuit towards practical application. In this review, we discussed the recent progresses of 2D-based logic circuit. We will first start with the different methods for realization of n-type metal-oxide-semiconductor (NMOS)-only (or p-type metal-oxide-semiconductor (PMOS)-only) logic circuit. Next, various device polarity control and complementary-metal-oxide-semiconductor (CMOS) approaches are summarized, including utilizing different 2D semiconductors with intrinsic complementary doping, charge transfer doping, contact engineering, and electrostatics doping. We will discuss the merits and drawbacks of each approach, and lastly conclude with a short perspective on the challenges and future developments of 2D logic circuit.

Double‐Gate MoS2 Field‐Effect Transistors with Full‐Range Tunable Threshold Voltage for Multifunctional Logic Circuits

“…The corresponding voltage gain is deduced and plotted in the inset image, with peak values of 26 and 91 for V DD of 1 and 4 V, respectively, which is among the highest as compared with the reported resistance‐type inverter circuit based on TMDCs. [ 36 ] In further works, such gain can be improved though constructing CMOS circuit by replacing the resistance with a p‐type FET as load. The easy threshold voltage control in such DGFET also enables us to realize resistance type inverter with full logic swing, which, to the best of our knowledge, has not been reported yet.…”

“…The total noise margin of the inverter can thus be deduced to be 3.72 V at V DD = 4 V, greater than 90% of the V DD , indicating high noise tolerance, which is superior as compared with most of the reported 2D materials‐based CMOS devices. [ 36 ] We also plot the power consumption of the inverter as a function of V DD . As shown in Figure 3d, because, with larger V IN , the channel MoS 2 possesses smaller resistance, the circuit shows larger power consumption at larger V IN values.…”

Wettability Engineering for Studying Ion Transport in 2D Layered Materials

“…With the advent of graphene and 2D transition metal dichalcogenides, probably most of the excitement has been about the exotic electronic and optical properties of these materials. [ 2–6 ] Their controlled intercalation with ions is considered a powerful knob for tuning these properties. [ 7 ] Yet more understanding about the behavior of ions within 2D materials is needed.…”

Design and Parametric Variation Assessment of Dopingless Nanotube Field-Effect Transistor (DL-NT-FET) for High Performance

“…The complementary metal-oxide-semiconductor (CMOS) technology has advanced through the decades to dominate the semiconductor industry with excellent features of low power and cost, dense packaging, and high-speed devices that are continuously scaled down in size [1][2][3]. When it comes to designing RF/analog circuits in the nanometer regime, several challenges have been encountered due to strict process requirements to maintain sharp source/drain region and short channel effects (SCEs) [4][5][6][7].…”