Rebasing Instruction Prefetching: An Industry Perspective

Ishíi, Yasuo; Lee, Jaekyu; Nathella, Krishnendra; Sunwoo, Dam

doi:10.1109/lca.2020.3035068

Cited by 13 publications

(7 citation statements)

References 14 publications

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“…Simulation parameters. We simulate and evaluate Thermometer using the ChampSim [5] simulator and adjust simulation parameters to resemble a recent state-of-the-art industry FDIP baseline [57,58], as listed in Table 1. We implement the optimal BTB replacement policy (Belady's algorithm [29,61]) and other existing policies including SRRIP [62], GHRP [20], and Hawkeye [60] to compare them with Thermometer.…”

Section: Experimental Methodologymentioning

confidence: 99%

“…Using these traces, we characterize BTB replacement challenges to design Thermometer, a novel profileguided BTB replacement technique. We validate Thermometer's effectiveness on 13 data center applications and on CBP-5 [15] and IPC-1 [17] traces that prior work [20,24,57,58] evaluate their frontend optimizations.…”

Section: Experimental Methodologymentioning

confidence: 99%

“…We profile only a portion of each application's execution; this portion is different from the tested execution and uses different inputs. Apart from evaluating Thermometer on these 13 real-world applications, we also evaluate Thermometer on a wide-range of common traces (663 CBP-5 [15] traces and 50 IPC-1 [17] traces) like prior work [20,24,57,58].…”

Section: Methodsmentioning

confidence: 99%

“…Hybrid techniques [27,77] combine the effectiveness of software and hardware mechanisms but further increase the code footprint of data center applications. FDIP [118,119] offers a good trade-off among existing I-cache prefetchers as it provides performance comparable to state-of-theart prefetchers [22,46,48,51,99,101,120,127] without incurring a high storage cost [57,58]. Consequently, FDIP and its variants are employed in modern processors [49,109,123,135].…”

Section: Related Workmentioning

confidence: 99%

“…FDIP decouples the branch prediction unit from the instruction fetch unit so that the frontend can run ahead, producing the instruction addresses likely to be executed in the near future. Prefetching I-cache lines corresponding to these future accesses avoids potential frontend stalls [83,84], providing performance similar to aggressive I-cache prefetchers [57,58].…”

Section: Introductionmentioning

confidence: 99%

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Thermometer

Song

Khan

Shahri

et al. 2022

Proceedings of the 49th Annual International Symposium on Computer Architecture

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Modern processors employ a decoupled frontend with Fetch Directed Instruction Prefetching (FDIP) to avoid frontend stalls in data center applications. However, the large branch footprint of data center applications precipitates frequent Branch Target Buffer (BTB) misses that prohibit FDIP from eliminating more than 40% of all frontend stalls. We find that the state-of-the-art BTB optimization techniques (e.g., BTB prefetching and replacement mechanisms) cannot eliminate these misses due to their inadequate understanding of branch reuse behavior in data center applications.In this paper, we first perform a comprehensive characterization of the branch behavior of data center applications, and determine that identifying optimal BTB replacement decisions requires considering both transient and holistic (i.e., across the entire execution) branch behavior. We then present Thermometer, a novel BTB replacement technique that realizes the holistic branch behavior via a profile-guided analysis. Based on the collected profile, Thermometer generates useful BTB replacement hints that the underlying hardware can leverage. We evaluate Thermometer using 13 widelyused data center applications and demonstrate that it provides an average speedup of 8.7% (0.4%-64.9%) while outperforming the state-of-the-art BTB replacement techniques by 5.6× (on average, the best performing prior work achieves 1.5% speedup). We also demonstrate that Thermometer achieves a performance speedup that is, on average, 83.6% of the speedup achieved by the optimal BTB replacement policy.

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Section: Experimental Methodologymentioning

confidence: 99%

Section: Experimental Methodologymentioning

confidence: 99%

Section: Methodsmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Thermometer

Song

Khan

Shahri

et al. 2022

Proceedings of the 49th Annual International Symposium on Computer Architecture

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Accurate and Fast Performance Modeling of Processors with Decoupled Front-end

Degawa

Koizumi

Nakamura

et al. 2021

2021 IEEE 39th International Conference on Computer Design (ICCD)

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Rebasing Microarchitectural Research with Industry Traces

Feliu,

Perais,

Jiménez

et al. 2023

2023 IEEE International Symposium on Workload Characterization (IISWC)

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Microarchitecture research relies on performance models with various degrees of accuracy and speed. In the past few years, one such model, ChampSim, has started to gain significant traction by coupling ease of use with a reasonable level of detail and simulation speed. At the same time, datacenter class workloads, which are not trivial to set up and benchmark, have become easier to study via the release of hundreds of industry traces following the first Championship Value Prediction (CVP-1) in 2018. A tool was quickly created to port the CVP-1 traces to the ChampSim format, which, as a result, have been used in many recent works. In this paper, we revisit this conversion tool and find that several key aspects of the CVP-1 traces are not preserved by the conversion. We therefore propose an improved converter that addresses most conversion issues as well as patches known limitations of the CVP-1 traces themselves. We evaluate the impact of our changes on two commits of ChampSim, with one used for the first Instruction Championship Prefetching (IPC-1) in 2020. We find that the performance variation stemming from higher accuracy conversion is significant.

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Rebasing Instruction Prefetching: An Industry Perspective

Cited by 13 publications

References 14 publications

Thermometer

Thermometer

Accurate and Fast Performance Modeling of Processors with Decoupled Front-end

Rebasing Microarchitectural Research with Industry Traces

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