Reasoning Algebraically About Refinement on TSO Architectures

Abstract

Abstract. The Total Store Order memory model is widely implemented by modern multicore architectures such as x86, where local buffers are used for optimisation, allowing limited forms of instruction reordering. The presence of buffers and hardware-controlled buffer flushes increases the level of non-determinism from the level specified by a program, complicating the already difficult task of concurrent programming. This paper presents a new notion of refinement for weak memory models, based on the observation that pending writes to a process' local variables may be treated as if the effect of the update has already occurred in shared memory. We develop an interval-based model with algebraic rules for various programming constructs. In this framework, several decomposition rules for our new notion of refinement are developed. We apply our approach to verify the spinlock algorithm from the literature.

Making Linearizability Compositional for Partially Ordered Executions

“…Furthermore, that condition is only defined when the underlying memory model is given operationally, rather than axiomatically like C11. Early attempts, targetting TSO architectures, used totally ordered histories but allowed the response of an operation to be moved to a corresponding "flush" event [16,7,27,14]. Others have considered the effects of linearizability in the context of a client abstraction.…”

Trace Semantics and Algebraic Laws for Total Store Order Memory Model

“…Thus, the effect of one memory write may be delayed. Since the write buffer conforms to the principle named First-In-First-Out (FIFO) [6] , the order of store-store can be guaranteed. A read from location (aka load) always demands to first check whether the processor's private buffer contains such a write to the same location.…”