Rearrangeable operation of large crosspoint switching networks

Varma

Krishnamurthy

1994

IEEE Trans. VLSI Syst.

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In a large nonblocking crossbar switch, the controller often becomes a bottleneck in terms of both performance and reliability. In this paper, we present a number of schemes for distributing the setup function among multiple controllers, thus improving both the performance and reliability of the switch. The controllers are symmetric and operate in parallel. The simplest of these schemes is the symmetric triangular scheme, where each request is serviceable only by one of the controllers, chosen based on the addresses of the ports involved in the request. This scheme has only a limited degree of fault-tolerance, because a controller-failure can be tolerated only by modifying the request-distribution, causing a temporary disruption of service. With N ports and K controllers, the number of buses needed to support nonblocking operation in this scheme is approximately N 1 ? 1 2 p K. In the chessboard scheme, every request is serviceable by one of two predetermined controllers | a primary controller and secondary controller. A request is routed to the secondary controller if the primary controller is not available. This scheme can tolerate any single failure among the controllers, but requires N buses for nonblocking operation. The dynamic distribution scheme with global load-balance is similar to the chessboard cheme, but routes each request dynamically to balance the load between the pair of controllers designated to handle the request. The number of buses for nonblocking operation in this case is shown to be N 1 ? 1 2 blog 2 Kc. This scheme requires sharing of the load information among the controllers. Such sharing is eliminated in the distribution scheme with handovers. In this scheme, each request is rst routed to a pre-assigned primary controller, which may then hand over the request to any of the remanining controllers based on local information, if it is unable to satisfy the request. The numner of buses needed for nonblocking operation for this scheme is N ? K. A comparison of the scheme by simulations is presented.

Section: Introductionmentioning

confidence: 99%

Distributed control schemes for fast arbitration in large crossbar networks

Varma

Krishnamurthy

1994

IEEE Trans. VLSI Syst.

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“…This approach maintains a uniform distribution of active drivers among the chips a t any time, but a penalty is paid in terms of the time required t o set up a new connection. Results on such rearrangeable operation are given in [8]. It is also possible to combine the two distinct approaches t o obtain some interesting tradeoffs between extra hardware, controller set-up time, and blocking probability.…”

Section: Discussionmentioning

confidence: 98%

“…Note that the sequence of connections and disconnections in the system is usually unpredictable. Therefore, it is not possible, in general, to achieve a uniform distribution of active drivers in the matrix without rearrangement of a subset of the existing connections whenever a new connection is made [8].…”

Section: One-sided Crosspoint Networkmentioning

confidence: 99%

“…Our focus in this paper is on architectural methods for reducing the simultaneous switching noise in the context of crossbar networks constructed from one-sided crosspoint switching chips [7,8]. When the simultaneous switching noise is the limiting constraint on the size of a crosspoint chip, these methods allow the synthesis of larger crossbar networks than would be possible otherwise.…”

Section: Introductionmentioning

confidence: 99%

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Reliable design of multichip nonblocking crossbars

Proceedings., 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors

Varma

Self Cite

A major problem in the design of VLSI crossbar networks is the simultaneous-switching noise (also known as Delta-I noise), caused by the simultaneous activation of a large number of line-drivers at the output leads of the VLSI package. For one-sided crossbars constructed from several crosspoint chips, an architectural solution for reducing the Delta-I noise is possible because of the existence of multiple switching paths between any pair of communicating ports. In a non-blocking configuration, one can reduce the maximum number of active line-drivers in a chip by using extra columns of chips. We derive tight upper and lower bounds for the number of additional columns required for a onesided non-blocking crossbar network when a Delta-I constraint is imposed. By using algorithms that allocate paths intelligently, a substantial reduction in the Delta-I noise can be achieved with a modest hardware overhead, if a small blocking probability is acceptable.

“…The design and properties of large one-sided crambars is presented in [3] for non-blocking operation, and in [8] for rearrangeable operation. For both cases, a centralized controller was used for bus arbitration and routing path setup needed to satisfy on-line requests for connections/'discomnections.…”

Section: Introductionmentioning

confidence: 99%

Fault-Tolerant Arbitration in Multichip Crossbar Switches

The Sixth International Conference on VLSI Design

Krishnamurthy²

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A major problem in the design of large multichip crossbar networks is the latency associated with the centralized controller used to arbitrate requests. W e present a solution to reduce this latency and also provide fault-tolerance b y the use of multiple controllers that can operate concurrently. This paper concentrates on crossbars that are constructed using onesided crosspoint switches, as such designs can alleviate simultaneous switching noise. Two arbitration mechanisms are proposed that provide a range of tradeogs in controller complexity and hardware overheads. We derive a lower bound on the number of busses required for any distributed control scheme and compare it with simulation results for a 64 port network. The resultsshow that besides reducing arbitration latencies, distributed control can provide almost non-blocking operation with little extra hardware, and with improved properties of fault-tolerance and graceful degradation.