Realtime wavelet video coder based on reduced memory accessing

Abstract

Abstract-In this paper, the VLSI implementation of a realtime EZW video coder is presented. The proposed architecture adopts a modified 2-D DWT subband decomposition scheme, with the purpose of reducing the transposition memory requirements of 2-D DWT. In addition, through the use of a parallelized partial zerotree EZW scheme, temporary buffer requirements between the DWT and EZW modules are also reduced. The video encoder is integrated in a 0.35 um 3LM chip by using 341 K transistors on a 4.93×4.93 mm 2 die.

Hardware-based JPEG 2000 video coding system

“…Also, classical 2-D motion compensated algorithms have been suggested in literature. [1][2][3][4][5][6][7][8] Similar to, 9,10 we follow a 2-D approach based on the JPEG 2000 coding of differential frames.…”