Real-Time RISC-V-Based CAN-FD Bus Diagnosis Tool

Abstract

Network Diagnosis Tools with industrial-grade quality are not widely available for common users such as researchers and students. This kind of tool enables users to develop Distributed Embedded Systems using low-cost and reliable setups. In the context of RISC-V Extensions and Domain-Specific Architecture, this paper proposes a Real-Time RISC-V-based CAN-FD Bus Diagnosis Tool, named RiscDiag CanFd, as an open-source alternative. The RISC-V Core extension is a CAN-FD Communication Unit controlled by a dedicated ISA Extension. Besides the extended RISC-V core, the proposed SoC provides UDP Communication via Ethernet for connecting the proposed solution to a PC. Additionally, a GUI application was developed for accessing and using the hardware solution deployed in an FPGA. The proposed solution is evaluated by measuring the lost frame rate, the precision of captured frames timestamps and the latency of preparing data for Ethernet communication. Measurements revealed a 0% frame loss rate, a timestamp error under 0.001% and an acquisition cycle jitter under 10 ns.

Mathematical model of the formation of the portfolio of the innovation structure of the technopark

“…The methodological basis of the study was the materials published in the scientific literature and periodicals [17][18][19][20], as well as the results obtained in previous studies [21,22].…”

Editorial for the Beyond Moore’s Law: Hardware Specialization and Advanced System on Chip

“…This design allows for flexible implementation options, supporting 16-bit, 32-bit, 64-bit, and 128-bit configurations on FPGA. Popovici et al (reference [ 5 ]) introduce a real-time RISC-V-based CAN-FD bus diagnosis tool and make the design publicly available. Wang et al (reference [ 6 ]) propose a TCP offload engine (TOE) prototype system on an FPGA to support a 100 Gbps high-performance throughput.…”