Real time power estimation and thread scheduling via performance counters

Abstract

Estimating power consumption is critical for hardware and software developers, and of the latter, particularly for OS programmers writing process schedulers. However, obtaining processor and system power consumption information can be non-trivial. Simulators are time consuming and prone to error. Power meters report whole-system consumption, but cannot give per-processor or per-thread information. More intrusive hardware instrumentation is possible, but such solutions are usually employed while designing the system, and are not meant for customer use.Given these difficulties, plus the current availability of some form of performance counters on virtually all platforms (even though such counters were initially designed for system bring-up, and not intended for general programmer consumption), we analytically derive functions for realtime estimation of processor and system power consumption using performance counter data on real hardware. Our model uses data gathered from microbenchmarks that capture potential application behavior. The model is independent of our test benchmarks, and thus we expect it to be well suited for future applications. We target chip multiprocessors, analyzing effects of shared resources and temperature on power estimation, leveraging our model to implement a simple, power-aware thread scheduler. The NAS and SPEC-OMP benchmarks shows a median error of 5.8% and 3.9%, respectively. SPEC 2006 shows a marginally higher median error of 7.2%.

Counter-Based Power Modeling Methods: Top-Down vs. Bottom-Up

“…When dealing with OS power-aware policies, this is a very necessary feature in order to guide the OS scheduling. One promising alternative is to build power models based on hardware events that describe the activity that a process is causing within a processor [15,16,17,18]. This has even been evaluated in shared virtualized environments in order to understand better the energy efficiency challenges [6] and to perform power and energy accounting [19,20].…”

“…PMCbased models are used on-line to guide power aware policies [15,23] or to evaluate novel research ideas. Their main advantage is that they allow to profile real systems and perform full executions without the need to carry out time-consuming simulations [24,25,26,27,28].…”

“…On the one hand, there are the Topdown approaches [15,17,24,26,29,30,31] which aim to define simple, fast and easy to deploy models. Top-down models achieve these objectives by being architecture agnostic, avoiding the requirement of specific knowledge of the modeled architecture and by using a reduced set of PMCs.…”

“…Ideally, this process is done systematically assuming linear relationships between power and PMCs, although sometimes the human interaction is used to improve the model accuracy. For example, one can apply transformations to the input data or generate piece-wise models if the power trend changes at a given threshold [15].…”

“…In the literature, we can find models trained using specifically designed microbenchmarks [15,16,18] or models trained using real applications [36]. The former claim more generality whereas the latter aim to be more accurate for such application domain.…”