Real-time multiple object centroid tracking for gesture recognition based on FPGA

Jin, Jungdong; Lee, Sang-Jun; Jeon, ByungMoo; Nguyen, Thuy Tuong; Jeon, Jae Wook

doi:10.1145/2448556.2448636

Cited by 10 publications

(13 citation statements)

References 8 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Having these set of persistent periodic applications (τ h ) to be scheduled on hardware, our scheduling approach will take the aid of the DPSFR to generate the time-slice wise offline schedule for all applications till the hyper-period (H) 3 . In 2 We have empirically chosen M to lie between 4 to 6, in experiments.…”

Section: B Hardware Application Schedulingmentioning

confidence: 99%

“…In 2 We have empirically chosen M to lie between 4 to 6, in experiments. 3 LCM of the deadlines of all applications Algorithm 1: S/W, H/W Application Partitioning Strategy Input: 1. N : set of n applications 2.…”

Section: B Hardware Application Schedulingmentioning

confidence: 99%

“…[2], have initiated to employ FPGA. Reconfigurable architecture has also secured its position in synthetic vision, object tracking [3], cryptography [4] etc.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Real-Time Application Processing for FPGA-Based Resilient Embedded Systems in Harsh Environments

Saha

Ehsan

Stoica

et al. 2018

2018 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)

View full text Add to dashboard Cite

Real-time embedded systems nowadays get employed in harsh environments such as space, nuclear sites to carry out critical operations. Along with the traditional software based (CPU) execution, FPGAs are now also emerging as a bright prospect to accomplish such routines. However, these platforms are often get plagued by faults generated due to the high radiations in such environments. As a result, the real-time applications running on the platform could also get jeopardized. Thus, efficient execution of a set of hard real-time applications on reconfigurable systems with anomaly detection and recovery mechanism is inevitable. This work aims at tackling such problem with a "healing" approach for extreme environments. Initially, the applications are intelligently partitioned for hardware and software execution, then attempts have been made to schedule hardware applications with intermittent preemption point. Upon detecting any abnormality on such distinct points, our approach orchestrates a healing mechanism to remediate the scenario without hampering the pre-determined schedule. Experimental validation of our proposed method reveals its effectiveness.

show abstract

Section: B Hardware Application Schedulingmentioning

confidence: 99%

Section: B Hardware Application Schedulingmentioning

confidence: 99%

See 1 more Smart Citation

Real-Time Application Processing for FPGA-Based Resilient Embedded Systems in Harsh Environments

Saha

Ehsan

Stoica

et al. 2018

2018 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)

View full text Add to dashboard Cite

show abstract

“…Many machine vision applications have been reported with carefully considered hardware complexities. For instance, a visual tracking system is used an optimised optical flow algorithm for VLIW DSP architectures, whilst a particle filter based approach for multiple object tracking implemented on an FPGA [5]. However, the power consumption and cost of the hardware platforms are too expensive for embedded systems to allow those systems are developing into practical products.…”

Section: Related Workmentioning

confidence: 99%

Towards a scalable hardware/software co-design platform for real-time pedestrian tracking based on a ZYNQ-7000 device

Yang

Sillitoe

et al. 2017

2017 IEEE International Conference on Consumer Electronics-Asia (ICCE-Asia)

View full text Add to dashboard Cite

Currently, most designers face a daunting task to research different design flows and learn the intricacies of specific software from various manufacturers in hardware/software co-design. An urgent need of creating a scalable hardware/software co-design platform has become a key strategic element for developing hardware/software integrated systems. In this paper, we propose a new design flow for building a scalable co-design platform on FPGA-based system-on-chip. We employ an integrated approach to implement a histogram oriented gradients (HOG) and a support vector machine (SVM) classification on a programmable device for pedestrian tracking. Not only was hardware resource analysis reported, but the precision and success rates of pedestrian tracking on nine open access image data sets are also analysed. Finally, our proposed design flow can be used for any real-time image processingrelated products on programmable ZYNQ-based embedded systems, which benefits from a reduced design time and provide a scalable solution for embedded image processing products.

show abstract

“…Embedded systems are now-a-days employing FPGAs as a prospecting computing platform in various fields, ranging from avionic and automotive systems, nuclear reactors [1] to synthetic vision, object tracking [2] etc. These FPGAs provide the performance efficiency of a dedicated hardware as well as flexibility of a general purpose processor.…”

Section: Introductionmentioning

confidence: 99%

Task Allocation Strategies for FPGA Based Heterogeneous System on Chip

Majumder

Saha

Chakrabarti

2017

Computer Information Systems and Industrial Management

View full text Add to dashboard Cite

Part 4: Engineering of Enterprise Software ProductsInternational audienceFPGA based heterogeneous System On Chips (SOCs) have become a prospective processing platform for modern performance-sensitive systems, like automotive, avionics, chemical reactor etc. In such system, “makespan” time minimization plays a crucial role to achieve higher throughput as well as performance efficiency and thus, efficient task allocation schemes are indeed essential. This paper presents two task allocation algorithms for such FPGA based heterogeneous SOCs. The first allocation strategy is based on well known “Branch and Bound” optimization technique. Secondly, we proposed a novel heuristic based allocation mechanism, TAMF (Task Allocation Mechanism for FPGA based heterogeneous SOC). The simulation based experimental results reveal that both the strategies are able to provide lower makespan time over various simulation scenarios with acceptable runtime overheads. Achieved simulation results are further tested through a validation, carried out on practical ZYNQ SOC platform using standard benchmark task sets

show abstract

Real-time multiple object centroid tracking for gesture recognition based on FPGA

Cited by 10 publications

References 8 publications

Real-Time Application Processing for FPGA-Based Resilient Embedded Systems in Harsh Environments

Real-Time Application Processing for FPGA-Based Resilient Embedded Systems in Harsh Environments

Towards a scalable hardware/software co-design platform for real-time pedestrian tracking based on a ZYNQ-7000 device

Task Allocation Strategies for FPGA Based Heterogeneous System on Chip

Contact Info

Product

Resources

About