Real-time IIR notch filtering using Darwinian adaption

Cain, G.D.; Yardim, A.; Brun, Jean-Marc; Summers, B.

doi:10.1109/iscas.1991.176366

Cited by 5 publications

(3 citation statements)

References 6 publications

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“…Another interesting field of application for GAs is described in Cain et al (1991), where GAs are applied in designing a FIR filter. The paper also suggests the possibility of applying GAs to the design of an IIR filter.…”

Section: Routing and Scheduling Problemsmentioning

confidence: 99%

Genetic algorithms and applications in system engineering: a survey

Caponetto¹,

Fortuna²,

Graziani³

et al. 1993

Transactions of the Institute of Measurement and Control

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In this paper an overview on Genetic Algorithms (GAs) is reported. GAs are described from a theoretical point of view, important implementation problems are dealt with and a wide variety of GA applications reported in system engineering literature are described. The survey also includes some studies at present in progress in our laboratories, regarding the use of GAs in solving optimisation problems in the fields of neural networks and control theory.

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Section: Routing and Scheduling Problemsmentioning

confidence: 99%

Genetic algorithms and applications in system engineering: a survey

Caponetto¹,

Fortuna²,

Graziani³

et al. 1993

Transactions of the Institute of Measurement and Control

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“…These include the adaptive algorithm based on the genetic algorithm (GA) [1][2][3], the new learning adaptive algorithm [4], and Darwinian approach to adaptive notch filters [5].…”

Section: Introductionmentioning

confidence: 99%

Hardware implementation of evolutionary digital filters

Abe

Kawamata

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.

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This paper designs and implements a hardware-based evolutionary digital filter (EDF). The EDF is an adaptive digital filter which is controlled by adaptive algorithm based on evolutionary computation. The hardware-based EDF consists of two submodules, that is, a filtering and fitness calculation (FFC) module and a reproduction and selection (RS) module. The FFC module has high computational ability to calculate the output and the fitness value since its submodules run in parallel. A synthesis result of the designed chip shows the clock frequency is 20.0MHz and the maximum sampling rate of the EDF is 3.7kHz. Moreover, the hardware-based EDF with 21 submodules of the FFC is 2.2 times faster than the software-based EDF.

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“…These include the adaptive algorithm based on the genetic algorithm (GA) [1]- [3], the new learning adaptive algorithm [4], and Darwinian approach to adaptive notch filters [5].…”

Section: Introductionmentioning

confidence: 99%

Design and FPGA Implementation of a Structure of Evolutionary Digital Filters for Hardware Implementation

Abe

Arai

Kawamata

2005 IEEE International Symposium on Circuits and Systems

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Abstract-In this paper, we design and implement an improved hardware-based evolutionary digital filter (EDF) version 2. The EDF is an adaptive digital filter which is controlled by adaptive algorithm based on evolutionary computation. The hardwarebased EDF version 1 consists of two submodules, that is, a filtering and fitness calculation (FFC) module and a reproduction and selection (RS) module. The FFC module has high computational ability to calculate the output and the fitness value since its submodules run in parallel. However, hardware size of the FFC module is large, and many machine cycles are needed. Thus, in the hardware-based EDF version 2, we combine the two modules to reduce its hardware size and machine cycles. A synthesis result on the FPGA shows the clock frequency is 65.5MHz and the maximum sampling rate of the hardware-based EDF version 2 is 4,948.1Hz. Moreover, the hardware-based EDF version 2 is 15.7 times faster than the hardware-based EDF version 1.

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Real-time IIR notch filtering using Darwinian adaption

Cited by 5 publications

References 6 publications

Genetic algorithms and applications in system engineering: a survey

Genetic algorithms and applications in system engineering: a survey

Hardware implementation of evolutionary digital filters

Design and FPGA Implementation of a Structure of Evolutionary Digital Filters for Hardware Implementation

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