Real-time communications scheduling for massively parallel processors

Games, Richard A.; Kanevsky, Arkady; Krupp, P.; Monk, Leonard

doi:10.1109/rttas.1995.516204

Cited by 8 publications

(4 citation statements)

References 11 publications

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“…This paper complements recent work on support for realtime communication in parallel machines [2], [3], [4], [5], [6], [7]. Several projects have proposed mechanisms to improve predictability in the wormhole-switched networks common in modern multicomputers.…”

Section: Related Worksupporting

confidence: 53%

“…Several projects have proposed mechanisms to improve predictability in the wormhole-switched networks common in modern multicomputers. In the absence of hardware support for priority-based scheduling, application and operating system software can control end-to-end performance by regulating the rate of packet injection at each source node [7]. However, this approach must limit utilization of the communication network to account for possible contention between packets, even from lowerpriority traffic.…”

Section: Related Workmentioning

confidence: 99%

“…However, instead of guaranteeing bounds on worst-case communication latency, most existing multicomputer network designs focus on providing good average network throughput and packet delay. Consequently, recent years have seen increasing interest in developing interconnection networks that provide performance guarantees in parallel machines [2], [3], [4], [5], [6], [7], [8].…”

Section: Introductionmentioning

confidence: 99%

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A router architecture for real-time communication in multicomputer networks

Rexford

Hall

Shin

1998

IEEE Trans. Comput.

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Parallel machines have the potential to satisfy the large computational demands of real-time applications. These applications require a predictable communication network, where time-constrained traffic requires bounds on throughput and latency, while good average performance suffices for best-effort packets. This paper presents a new router architecture that tailors low-level routing, switching, arbitration, flow-control, and deadlock-avoidance policies to the conflicting demands of each traffic class. The router implements bandwidth regulation and deadline-based scheduling, with packet switching and table-driven multicast routing, to bound end-to-end delay and buffer requirements for time-constrained traffic while allowing best-effort traffic to capitalize on the low-latency routing and switching schemes common in modern parallel machines. To limit the cost of servicing timeconstrained traffic, the router includes a novel packet scheduler that shares link-scheduling logic across the multiple output ports, while masking the effects of clock rollover on the represention of packet eligibility times and deadlines. Using the Verilog hardware description language and the Epoch silicon compiler, we demonstrate that the router design meets the performance goals of both traffic classes in a single-chip solution. Verilog simulation experiments on a detailed timing model of the chip show how the implementation and performance properties of the packet scheduler scale over a range of architectural parameters.

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Section: Related Worksupporting

confidence: 53%

Section: Related Workmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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A router architecture for real-time communication in multicomputer networks

Rexford

Hall

Shin

1998

IEEE Trans. Comput.

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“…Some scheduling policies, such as Virtual Clock [28], Stop-andGo [8], Rotating Combined Queuing [12], do not explicitly use message deadlines, but just attempt to keep the worst-case message delay small and bounded. Other relevant experimental work includes [20], [27], [17], [26], and [7].…”

Section: Summary Of Resultsmentioning

confidence: 99%

Time-constrained scheduling of weighted packets on trees and meshes

Adler

Khanna²,

Rajaraman

et al. 1999

Proceedings of the Eleventh Annual ACM Symposium on Parallel Algorithms and Architectures

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Abstract. The time-constrained packet routing problem is to schedule a set of packets to be transmitted through a multinode network, where every packet has a source and a destination (as in traditional packet routing problems) as well as a release time and a deadline. The objective is to schedule the maximum number of packets subject to deadline constraints. This problem is studied in [1], where it is shown that the problem is NP-Complete even when the underlying topology is a linear array. Approximation algorithms are also provided in [1] for the linear array and the unidirectional ring for both the case where packets may be buffered in transit and the case where they may not be.In this paper we extend the results of [1] in two directions. First, we consider the more general network topologies of trees and two-dimensional meshes. Second, we associate with each packet a measure of utility, called a weight, and study the problem of maximizing the total weight of the packets that are scheduled subject to their timing constraints. For the bufferless case, we provide constant factor approximation algorithms for the time-constrained scheduling problem with weighted packets on trees and meshes. We also provide logarithmic approximations for the same problems in the buffered case. These results are complemented by new lower bounds, which demonstrate that we cannot hope to achieve the same results for general network topologies. For example, we show that if k packets are required to follow prescribed paths in an arbitrary graph, then unless NP = ZPP, there is no polynomial-time k 1−ε -approximation, for any ε > 0, to the optimal set of packets that can be scheduled.

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