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Software‐defined radio (SDR) has been identified as a potential method to enhance flexible wireless communication systems. The operation speed of an analog/digital converter (ADC) and processing ability of digital signal processing (DSP) chips are key factors in the development of SDR for useful commercial applications. More recent advances in semiconductor processing technology and the development of reconfigurable devices such as digital signal processors and field‐programmable gate arrays (FPGAs) reduce the development time of commercial products. SDR in conjunction with six‐port receivers has promising applications for use in wireless LANs, audio and television broadcasting, and interoperability between different radio services, as seen by new studies on the use of six‐port technology in various design aspects of a new SDR receiver. The objective is to realize an application of SDR to provide a multichannel, multimode wireless direct digital receiver. The combination of SDR and six‐port technology provides great flexibility in system configuration; significant reduction in hardware cost, particularly at millimeter‐wave frequencies; and potential for software reuse. The six‐port receiver approach offers wideband accommodation to ever‐changing communication specifications required in a SDR as much of its functionality is defined in software. Different types of six‐port circuits have been designed, with center frequencies at 2.4, 5.8, 24, and 28 GHz, operating over wide frequency bands. Some six‐port circuits are based on microstrip structures and are fabricated with hybrid microwave integrated circuit (MHMIC) or monolithic microwave integrated circuit (MMIC) technology at both microwave and millimeter‐wave frequencies. Other circuits use a novel substrate‐integrated waveguide (SIW) structure allowing integration of planar integrated circuit structure with waveguide structure. The performances of these six‐port circuits in digital receivers are reported in relation to signal modulation schemes, noise performance analysis calibration, and coding. Bit error rate simulation and measurement results obtained with demodulation algorithms are given for QPSK and QAM‐16 signals under a variety of operating conditions. Initial results show promising applications of six‐port technology for direct digital conversion demodulation reception, needed in future low‐cost SDR communication systems. Measurement and simulated demodulation results obtained with coding algorithms are also given.
Software‐defined radio (SDR) has been identified as a potential method to enhance flexible wireless communication systems. The operation speed of an analog/digital converter (ADC) and processing ability of digital signal processing (DSP) chips are key factors in the development of SDR for useful commercial applications. More recent advances in semiconductor processing technology and the development of reconfigurable devices such as digital signal processors and field‐programmable gate arrays (FPGAs) reduce the development time of commercial products. SDR in conjunction with six‐port receivers has promising applications for use in wireless LANs, audio and television broadcasting, and interoperability between different radio services, as seen by new studies on the use of six‐port technology in various design aspects of a new SDR receiver. The objective is to realize an application of SDR to provide a multichannel, multimode wireless direct digital receiver. The combination of SDR and six‐port technology provides great flexibility in system configuration; significant reduction in hardware cost, particularly at millimeter‐wave frequencies; and potential for software reuse. The six‐port receiver approach offers wideband accommodation to ever‐changing communication specifications required in a SDR as much of its functionality is defined in software. Different types of six‐port circuits have been designed, with center frequencies at 2.4, 5.8, 24, and 28 GHz, operating over wide frequency bands. Some six‐port circuits are based on microstrip structures and are fabricated with hybrid microwave integrated circuit (MHMIC) or monolithic microwave integrated circuit (MMIC) technology at both microwave and millimeter‐wave frequencies. Other circuits use a novel substrate‐integrated waveguide (SIW) structure allowing integration of planar integrated circuit structure with waveguide structure. The performances of these six‐port circuits in digital receivers are reported in relation to signal modulation schemes, noise performance analysis calibration, and coding. Bit error rate simulation and measurement results obtained with demodulation algorithms are given for QPSK and QAM‐16 signals under a variety of operating conditions. Initial results show promising applications of six‐port technology for direct digital conversion demodulation reception, needed in future low‐cost SDR communication systems. Measurement and simulated demodulation results obtained with coding algorithms are also given.
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